[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

[Misha Brukman]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.11 -> 1.12

---
Log message:

Treat longs as ints => pretend they're all 32-bit values and squeeze them into
32-bit registers.


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Diffs of the changes:

Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.11 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.12
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.11	Fri Dec 13 03:54:12 2002
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Fri Dec 13 04:43:09 2002
@@ -55,6 +55,8 @@
   case 1: opcode = X86::MOVmr8; break;
   case 2: opcode = X86::MOVmr16; break;
   case 4: opcode = X86::MOVmr32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVmr32; break;
   default: assert(0 && "Invalid data size!");
   }
 
@@ -74,6 +76,8 @@
   case 1: opcode = X86::MOVrr8; break;
   case 2: opcode = X86::MOVrr16; break;
   case 4: opcode = X86::MOVrr32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVrr32; break;
   default: assert(0 && "Invalid data size!");
   }
   
@@ -92,6 +96,8 @@
   case 1: opcode = X86::MOVir8; break;
   case 2: opcode = X86::MOVir16; break;
   case 4: opcode = X86::MOVir32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVir32; break;
   default: assert(0 && "Invalid data size!");
   }