[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h TargetMachine.h

[Misha Brukman]

Changes in directory llvm/include/llvm/Target:

MRegisterInfo.h updated: 1.1 -> 1.2
TargetMachine.h updated: 1.19 -> 1.20

---
Log message:

MRegisterInfo.h - Added prototypes for functions we need to map a register to
an appropriate TargetRegisterClass, also adds TargetRegisterClass definition.
TargetMachine.h - speling.


---
Diffs of the changes:

Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.1 llvm/include/llvm/Target/MRegisterInfo.h:1.2
--- llvm/include/llvm/Target/MRegisterInfo.h:1.1	Fri Oct 25 18:00:40 2002
+++ llvm/include/llvm/Target/MRegisterInfo.h	Wed Nov 20 12:54:53 2002
@@ -6,11 +6,14 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_CODEGEN_MREGISTERINFO_H
-#define LLVM_CODEGEN_MREGISTERINFO_H
+#ifndef LLVM_TARGET_MREGISTERINFO_H
+#define LLVM_TARGET_MREGISTERINFO_H
 
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include <assert.h>
 
+class Type;
+
 /// MRegisterDesc - This record contains all of the information known about a
 /// particular register.
 ///
@@ -38,6 +41,30 @@
   };
 };
 
+class TargetRegisterClass {
+protected:
+  TargetRegisterClass() {}
+
+public:
+
+  typedef unsigned* iterator;
+  typedef unsigned* const_iterator;
+
+  iterator       begin();
+  iterator         end();
+  const_iterator begin() const;
+  const_iterator   end() const;
+
+  virtual unsigned getNumRegs() const { return 0; }
+  virtual unsigned getRegister(unsigned idx) const { return 0; }
+
+  virtual unsigned getDataSize() const { return 0; }
+
+  //const std::vector<unsigned> &getRegsInClass(void) { return Regs; }
+  //void getAliases(void);
+};
+
+
 /// MRegisterInfo base class - We assume that the target defines a static array
 /// of MRegisterDesc objects that represent all of the machine registers that
 /// the target has.  As such, we simply have to track a pointer to this array so
@@ -79,8 +106,25 @@
   ///
   const MRegisterDesc &get(unsigned RegNo) const { return operator[](RegNo); }
 
-  // This will eventually get some virtual methods...
-  
+
+  virtual void copyReg2PCRel(MachineBasicBlock *MBB,
+                             MachineBasicBlock::iterator &MBBI,
+                             unsigned SrcReg, unsigned ImmOffset,
+                             unsigned dataSize) const = 0;
+
+  virtual void copyPCRel2Reg(MachineBasicBlock *MBB,
+                             MachineBasicBlock::iterator &MBBI,
+                             unsigned ImmOffset, unsigned DestReg,
+                             unsigned dataSize) const = 0;
+
+  /// Register class iterators
+  typedef const TargetRegisterClass* const_iterator;
+
+  virtual const_iterator const_regclass_begin() const = 0;
+  virtual const_iterator const_regclass_end() const = 0;
+
+  virtual unsigned getNumRegClasses() const = 0;
+  virtual const TargetRegisterClass* getRegClassForType(const Type* Ty) const=0;
 };
 
 #endif


Index: llvm/include/llvm/Target/TargetMachine.h
diff -u llvm/include/llvm/Target/TargetMachine.h:1.19 llvm/include/llvm/Target/TargetMachine.h:1.20
--- llvm/include/llvm/Target/TargetMachine.h:1.19	Tue Oct 29 18:53:02 2002
+++ llvm/include/llvm/Target/TargetMachine.h	Wed Nov 20 12:54:53 2002
@@ -1,4 +1,4 @@
-//===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==//
+//===-- llvm/Target/TargetMachine.h - General Target Information -*- C++ -*-==//
 //
 // This file describes the general parts of a Target machine.
 //
@@ -68,7 +68,7 @@
   virtual const MachineOptInfo&         getOptInfo()   const = 0;
 
   /// getRegisterInfo - If register information is available, return it.  If
-  /// not, return null.  This is kept seperate from RegInfo until RegInfo gets
+  /// not, return null.  This is kept separate from RegInfo until RegInfo gets
   /// straightened out.
   ///
   virtual const MRegisterInfo*          getRegisterInfo() const { return 0; }