[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.2 -> 1.3

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Log message:

Add information about memory index representation


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Diffs of the changes:

Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.2 llvm/lib/Target/X86/README.txt:1.3
--- llvm/lib/Target/X86/README.txt:1.2	Wed Oct 30 00:04:46 2002
+++ llvm/lib/Target/X86/README.txt	Sun Nov 17 14:33:26 2002
@@ -128,8 +128,33 @@
 bunch of really trivial testcases that we should build up to supporting.
 
 
+===================================================
+IV. Strange Things, or, Things That Should Be Known
+===================================================
+
+Representing memory in MachineInstrs
+------------------------------------
+
+The x86 has a very, uhm, flexible, way of accessing memory.  It is capable of
+addressing memory addresses of the following form directly in integer
+instructions (which use ModR/M addressing):
+
+   Base+[1,2,4,8]*IndexReg+Disp32
+
+Wow, that's crazy.  In order to represent this, LLVM tracks no less that 4
+operands for each memory operand of this form.  This means that the "load" form
+of 'mov' has the following "Operands" in this order:
+
+Index:        0     |    1        2       3           4
+Meaning:   DestReg, | BaseReg,  Scale, IndexReg, Displacement
+OperandTy: VirtReg, | VirtReg, UnsImm, VirtReg,   SignExtImm
+
+Stores and all other instructions treat the four memory operands in the same
+way, in the same order.
+
+
 ==========================
-IV. TODO / Future Projects
+V. TODO / Future Projects
 ==========================
 
 There are a large number of things remaining to do.  Here is a partial list: