[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp MachineInstrAnnot.cpp

Vikram Adve vadve at cs.uiuc.edu
Tue Oct 29 13:41:01 PST 2002


Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.57 -> 1.58
MachineInstrAnnot.cpp updated: 1.4 -> 1.5

---
Log message:

Remove separate vector of implicit refs from MachineInstr, and
instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.


---
Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.57 llvm/lib/CodeGen/MachineInstr.cpp:1.58
--- llvm/lib/CodeGen/MachineInstr.cpp:1.57	Tue Oct 29 11:40:30 2002
+++ llvm/lib/CodeGen/MachineInstr.cpp	Tue Oct 29 13:40:17 2002
@@ -19,24 +19,33 @@
 // Constructor for instructions with fixed #operands (nearly all)
 MachineInstr::MachineInstr(MachineOpCode _opCode)
   : opCode(_opCode),
-    operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) {
+    operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
+    numImplicitRefs(0)
+{
   assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
 }
 
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
-  : opCode(OpCode), operands(numOperands, MachineOperand()) {
+  : opCode(OpCode),
+    operands(numOperands, MachineOperand()),
+    numImplicitRefs(0)
+{
 }
 
 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
-                           bool XX, bool YY) : opCode(Opcode) {
+                           bool XX, bool YY)
+  : opCode(Opcode),
+    numImplicitRefs(0)
+{
   operands.reserve(numOperands);
 }
 
 // OperandComplete - Return true if it's illegal to add a new operand
-bool MachineInstr::OperandsComplete() const {
+bool MachineInstr::OperandsComplete() const
+{
   int NumOperands = TargetInstrDescriptors[opCode].numOperands;
-  if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands)
+  if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
     return true;  // Broken!
   return false;
 }
@@ -47,7 +56,10 @@
 // This only resets the size of the operand vector and initializes it.
 // The new operands must be set explicitly later.
 // 
-void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) {
+void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
+{
+  assert(getNumImplicitRefs() == 0 &&
+         "This is probably broken because implicit refs are going to be lost.");
   opCode = Opcode;
   operands.clear();
   operands.resize(numOperands, MachineOperand());
@@ -60,7 +72,7 @@
                                    bool isdef,
                                    bool isDefAndUse)
 {
-  assert(i < operands.size());
+  assert(i < operands.size());          // may be explicit or implicit op
   operands[i].opType = opType;
   operands[i].value = V;
   operands[i].regNum = -1;
@@ -77,7 +89,7 @@
 				MachineOperand::MachineOperandType operandType,
                                      int64_t intValue)
 {
-  assert(i < operands.size());
+  assert(i < getNumOperands());          // must be explicit op
   assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
          "immed. constant cannot be defined");
 
@@ -92,7 +104,7 @@
 MachineInstr::SetMachineOperandReg(unsigned i,
                                    int regNum,
                                    bool isdef) {
-  assert(i < operands.size());
+  assert(i < getNumOperands());          // must be explicit op
 
   operands[i].opType = MachineOperand::MO_MachineRegister;
   operands[i].value = NULL;
@@ -107,6 +119,7 @@
 void
 MachineInstr::SetRegForOperand(unsigned i, int regNum)
 {
+  assert(i < getNumOperands());          // must be explicit op
   operands[i].setRegForValue(regNum);
   insertUsedReg(regNum);
 }
@@ -129,11 +142,11 @@
         }
 
   // Subsitute implicit refs
-  for (unsigned i=0, N=implicitRefs.size(); i < N; ++i)
+  for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
     if (getImplicitRef(i) == oldVal)
       if (!defsOnly || implicitRefIsDefined(i))
         {
-          implicitRefs[i].Val = newVal;
+          getImplicitOp(i).value = newVal;
           ++numSubst;
         }
 


Index: llvm/lib/CodeGen/MachineInstrAnnot.cpp
diff -u llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.4 llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.5
--- llvm/lib/CodeGen/MachineInstrAnnot.cpp:1.4	Sun Oct 27 20:28:34 2002
+++ llvm/lib/CodeGen/MachineInstrAnnot.cpp	Tue Oct 29 13:40:17 2002
@@ -6,18 +6,17 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/MachineInstrAnnot.h"
-#include "llvm/Annotation.h"
+#include "llvm/CodeGen/InstrSelection.h"
+#include "llvm/CodeGen/InstrSelectionSupport.h"
+#include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/iOther.h"
 #include "llvm/Type.h"
 
-AnnotationID CallArgsDescriptor::AID(AnnotationManager::
-                                     getID("CodeGen::CallArgsDescriptor"));
 
 CallArgsDescriptor::CallArgsDescriptor(const CallInst* _callInstr,
                                        TmpInstruction* _retAddrReg,
                                        bool _isVarArgs, bool _noPrototype)
-  : Annotation(AID),
-    callInstr(_callInstr),
+  : callInstr(_callInstr),
     funcPtr(isa<Function>(_callInstr->getCalledValue())
             ? NULL : _callInstr->getCalledValue()),
     retAddrReg(_retAddrReg),
@@ -30,6 +29,10 @@
          && "Operand 0 is ignored in the loop below!");
   for (unsigned int i=1; i < numArgs; ++i)
     argInfoVec.push_back(CallArgInfo(callInstr->getOperand(i)));
+
+  // Enter this object in the MachineCodeForInstr object of the CallInst.
+  // This transfers ownership of this object.
+  MachineCodeForInstruction::get(callInstr).setCallArgsDescriptor(this); 
 }
 
 
@@ -37,4 +40,27 @@
 CallArgsDescriptor::getReturnValue() const
 {
   return (callInstr->getType() == Type::VoidTy? NULL : callInstr);
+}
+
+
+// Mechanism to get the descriptor for a CALL MachineInstr.
+// We get the LLVM CallInstr from the ret. addr. register argument
+// of the CALL MachineInstr, then get the CallArgsDescriptor from the
+// MachineCodeForInstruction object for the CallInstr.
+// This is roundabout but avoids adding a new map or annotation just
+// to keep track of CallArgsDescriptors.
+// 
+CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr* MI)
+{
+  const TmpInstruction* retAddrReg =
+    cast<TmpInstruction>(MI->getImplicitRef(MI->getNumImplicitRefs()-1));
+  assert(retAddrReg->getNumOperands() == 1 &&
+         isa<CallInst>(retAddrReg->getOperand(0)) &&
+         "Order of implicit args of CALL instr. changed. FIX THIS CODE!");
+  const CallInst* callInstr = cast<CallInst>(retAddrReg->getOperand(0));
+
+  CallArgsDescriptor* desc =
+    MachineCodeForInstruction::get(callInstr).getCallArgsDescriptor(); 
+  assert(desc->getCallInst()==callInstr && "Incorrect call args descriptor?");
+  return desc;
 }





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