<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/157131>157131</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Poor code generation for boolean vectors on AVX2
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          jhuber6
      </td>
    </tr>
</table>

<pre>
    Boolean vectors are often lowered to integral operations. This code generates the expected bitwise operations only when `avx512f` is available even though it does not require use of mask registers https://clang.godbolt.org/z/vrdbo9YKa.

```c++
#include <cstdint>

typedef __attribute__((ext_vector_type(16))) int16_t i16x16;
typedef __attribute__((ext_vector_type(16))) bool i1x16;

int A(i16x16);

void test(i16x16 v, i1x16 a, i1x16 b) {
    i1x16 m = (a & (~b)) != 0;
    if (__builtin_reduce_or(m))
        A(v);
}
```

This is introduced at the first instruction selection phase, so I am guessing that lowering these is trying to use the mask registers which then get optimized away.
</pre>
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