<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/155395>155395</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [Clang] VectorExprEvaluator::VisitCallExpr - add MMX/SSE/AVX PHADD/SUB & HADDPS/D intrinsics to be used in constexpr
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            good first issue,
            backend:X86,
            clang:frontend,
            constexpr
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    The HADD/SUB horizontal intrinsics can all be used in constexpr with suitable handling of the __builtin_ia32_phadd/sub* builtins inside VectorExprEvaluator::VisitCallExpr
```
_mm_hadd_pi16 _mm_hadd_epi16 _mm256_hadd_epi16 
_mm_hadd_pi32 _mm_hadd_epi32 _mm256_hadd_epi32
_mm_hadds_pi16 _mm_hadds_epi16 _mm256_hadds_epi16 

_mm_hsub_pi16 _mm_hsub_epi16 _mm256_hsub_epi16 
_mm_hsub_pi32 _mm_hsub_epi32 _mm256_hsub_epi32
_mm_hsubs_pi16 _mm_hsubs_epi16 _mm256_hsubs_epi16 

_mm_hadd_pd _mm256_hadd_pd
_mm_hadd_ps _mm256_hadd_ps
_mm_hsub_pd _mm256_hsub_pd
_mm_hsub_ps _mm256_hsub_ps 
```
These are elementwise horizontal pairwise so getting the correct src/dst element indices is vital and use a mixture of regular add/sub, fadd/fsub and signed sat add/sub arithmetic
</pre>
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