<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/154539>154539</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[Headers][X86] Allow AVX/AVX512 generic conversion intrinsics to be used in constexpr
</td>
</tr>
<tr>
<th>Labels</th>
<td>
good first issue,
backend:X86,
clang:headers,
constexpr
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
RKSimon
</td>
</tr>
</table>
<pre>
Followup to #152315, these are all the remaining intrinsics I can locate that just wrap __builtin_convertvector/__builtin_shufflevector and can be easily used in constexpr with suitable test coverage
```
avxintrin.h
_mm256_cvtepi32_pd
_mm256_cvtepi32_ps
_mm256_cvtps_pd
avx512fintrin.h
_mm512_cvtepi32_ps _mm512_mask_cvtepi32_ps _mm512_maskz_cvtepi32_ps
_mm512_cvtepu32_ps _mm512_mask_cvtepu32_ps _mm512_maskz_cvtepu32_ps
_mm512_cvtepi32_pd _mm512_mask_cvtepi32_pd _mm512_maskz_cvtepi32_pd _mm512_cvtepi32lo_pd _mm512_mask_cvtepi32lo_pd
_mm512_cvtepu32_pd _mm512_mask_cvtepu32_pd _mm512_maskz_cvtepu32_pd _mm512_cvtepu32lo_pd _mm512_mask_cvtepu32lo_pd
_mm512_cvtps_pd _mm512_mask_cvtps_pd _mm512_maskz_cvtps_pd _mm512_cvtpslo_pd _mm512_mask_cvtpslo_pd
_mm512_mask_cvtepi8_epi32 _mm512_maskz_cvtepi8_epi32
_mm512_mask_cvtepi8_epi64 _mm512_maskz_cvtepi8_epi64
_mm512_mask_cvtepi16_epi32 _mm512_maskz_cvtepi16_epi32
_mm512_mask_cvtepi16_epi64 _mm512_maskz_cvtepi16_epi64
_mm512_mask_cvtepi32_epi64 _mm512_maskz_cvtepi32_epi64
_mm512_mask_cvtepu8_epi32 _mm512_maskz_cvtepu8_epi32
_mm512_mask_cvtepu8_epi64 _mm512_maskz_cvtepu8_epi64
_mm512_mask_cvtepu16_epi32 _mm512_maskz_cvtepu16_epi32
_mm512_mask_cvtepu16_epi64 _mm512_maskz_cvtepu16_epi64
_mm512_mask_cvtepu32_epi64 _mm512_maskz_cvtepu32_epi64
avx512vlintrin.h
_mm_mask_cvtepi32_pd _mm_maskz_cvtepi32_pd
_mm_mask_cvtepi32_ps _mm_maskz_cvtepi32_ps
_mm_cvtepu32_pd _mm_mask_cvtepu32_pd _mm_maskz_cvtepu32_pd
_mm_cvtepu32_ps _mm_mask_cvtepu32_ps _mm_maskz_cvtepu32_ps
_mm256_mask_cvtepi32_pd _mm256_maskz_cvtepi32_pd
_mm256_mask_cvtepi32_ps _mm256_maskz_cvtepi32_ps
_mm256_cvtepu32_pd _mm256_mask_cvtepu32_pd _mm256_maskz_cvtepu32_pd
_mm256_cvtepu32_ps _mm256_mask_cvtepu32_ps _mm256_maskz_cvtepu32_ps
_mm_cvtepi32_epi8 _mm_mask_cvtepi32_epi8 _mm_maskz_cvtepi32_epi8
_mm_cvtepi32_epi16 _mm_mask_cvtepi32_epi16 _mm_maskz_cvtepi32_epi16
_mm_cvtepi64_epi8 _mm_mask_cvtepi64_epi8 _mm_maskz_cvtepi64_epi8
_mm_cvtepi64_epi16 _mm_mask_cvtepi64_epi16 _mm_maskz_cvtepi64_epi16
_mm_cvtepi64_epi32 _mm_mask_cvtepi64_epi32 _mm_maskz_cvtepi64_epi32
_mm256_cvtepi32_epi8 _mm256_mask_cvtepi32_epi8 _mm256_maskz_cvtepi32_epi8
_mm256_cvtepi32_epi16 _mm256_mask_cvtepi32_epi16 _mm256_maskz_cvtepi32_epi16
_mm256_cvtepi64_epi8 _mm256_mask_cvtepi64_epi8 _mm256_maskz_cvtepi64_epi8
_mm256_cvtepi64_epi16 _mm256_mask_cvtepi64_epi16 _mm256_maskz_cvtepi64_epi16
_mm256_cvtepi64_epi32 _mm256_mask_cvtepi64_epi32 _mm256_maskz_cvtepi64_epi32
avx512dqintrin.h
_mm512_cvtepi64_pd _mm512_mask_cvtepi64_pd _mm512_maskz_cvtepi64_pd
_mm512_cvtepu64_pd _mm512_mask_cvtepu64_pd _mm512_maskz_cvtepu64_pd
avx512vldqintrin.h
_mm_cvtepi64_pd _mm_mask_cvtepi64_pd _mm_maskz_cvtepi64_pd
_mm_cvtepu64_pd _mm_mask_cvtepu64_pd _mm_maskz_cvtepu64_pd
_mm_cvtepi64_ps _mm_mask_cvtepi64_ps _mm_maskz_cvtepi64_ps
_mm_cvtepu64_ps _mm_mask_cvtepu64_ps _mm_maskz_cvtepu64_ps
_mm256_cvtepi64_pd _mm256_mask_cvtepi64_pd _mm256_maskz_cvtepi64_pd
_mm256_cvtepu64_pd _mm256_mask_cvtepu64_pd _mm256_maskz_cvtepu64_pd
_mm256_cvtepi64_ps _mm256_mask_cvtepi64_ps _mm256_maskz_cvtepi64_ps
_mm256_cvtepu64_ps _mm256_mask_cvtepu64_ps _mm256_maskz_cvtepu64_ps
avx512bwintrin.h
_mm512_mask_cvtepi8_epi16 _mm512_maskz_cvtepi8_epi16
_mm512_mask_cvtepu8_epi16 _mm512_maskz_cvtepu8_epi16
avx512vlbwintrin.h
_mm_cvtepi16_epi8 _mm_mask_cvtepi16_epi8 _mm_maskz_cvtepi16_epi8
_mm256_cvtepi16_epi8 _mm256_mask_cvtepi16_epi8 _mm256_maskz_cvtepi16_epi8
avx512vlfp16intrin.h
_mm_cvtepi16_ph _mm_mask_cvtepi16_ph _mm_maskz_cvtepi16_ph
_mm_cvtepu16_ph _mm_mask_cvtepu16_ph _mm_maskz_cvtepu16_ph
_mm256_cvtepi16_ph _mm256_mask_cvtepi16_ph _mm256_maskz_cvtepi16_ph
_mm256_cvtepu16_ph _mm256_mask_cvtepu16_ph _mm256_maskz_cvtepu16_ph
_mm256_cvtepi32_ph _mm256_mask_cvtepi32_ph _mm256_maskz_cvtepi32_ph
_mm256_cvtepu32_ph _mm256_mask_cvtepu32_ph _mm256_maskz_cvtepu32_ph
```
I may have missed a few others :/
</pre>
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