<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/154258>154258</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Missed optimization: eliminate redundant 64-bit check in 16-bit-range test
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
zxt5
</td>
</tr>
</table>
<pre>
```
define i1 @src(i32 %v3, i32 %v4) local_unnamed_addr #0 {
%v5 = shl i32 %v3, %v4
%v6 = sext i32 %v5 to i64
%v7 = add i32 %v5, 32768
%v8 = add nsw i64 %v6, 2147516416
%v9 = icmp samesign ult i64 %v8, 4294967296
%v131 = icmp ult i32 %v7, 65536
%v13 = select i1 %v9, i1 %v131, i1 false
ret i1 %v13
}
define i1 @tgt(i32 %v3, i32 %v4) local_unnamed_addr #0 {
%v5 = shl i32 %v3, %v4
%v6 = add i32 %v5, 32768
%v7 = icmp ult i32 %v6, 65536
ret i1 %v7
}
```
Alive2: https://alive2.llvm.org/ce/z/LqPTo5
Godbolt: https://godbolt.org/z/EhTMocTj7
Pattern found in https://github.com/dtcxzyw/llvm-opt-benchmark/blob/main/bench/ffmpeg/optimized/g723_1enc.ll
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJy0lM9u3DYQxp9mdCG8EIektDrosKmrXhogB98NipzdZUKRW5GyHT99Qe2_xC3aUwBBwGh-3wznG4E6JXcIRD2oT6AeK73kY5z797esqjHa7z009eWpd5b2LhBznIGs02wAt04gA1QvAvA3dg0kYMd8NNo_LyHoieyztnZmgKJm0H6CesdWUDEQjywdPfupzrnGFWrOEL3lG6VYjsw1d6ZdGW3tHSmFBLbN9gZtb1BIr0V-Ll9A5LJVvJG8udHdSjsznVjSExWb2OLzTbctOomd7JoWu7uOC35XroLLidoiaJQSK3tGL6N5Mnm1tfRdneTXWpdor32itcdM-Z6GegftY3l_2E4-5F--nfty_sf49t8NaX4y5MfB2vtcP_x-UO923r0QgtixY86nBGIHOAAOev2-8f5l2sT5ADgYAhzeAYc___ryFBXUuz-iHaPP_xQfzomLsGh-Pz59jubpa3vu-kXnTHNg-7gEy1z4qHf5uIwbEyfAwWbz9v79FXAoh3mIp_wwUjDHSc_fAIfRxxFwmLQLJSoZwGG_n05UmsdTdpN7J1vKtiieOQWz8b6yvbCd6HRFPW-VUq1EwatjP46ScG8b2Zq647JphDUSjVBbjnqLY-V6rFHVW97VQtSCb0aUdo8GeUdKNIpA1jRp52_mVS6lhXquJKpt5fVIPq3XA2KgV7ZmAbHcFnO_DjkuhwSy9i7ldC-TXfbUf3YpkWWXwXR2MZQNkHeTCzoTm8kuweqQWSMfRpeZOZL5VlzmTYkfZh0OxDKlXC2z7__D-9L6avxpjl_JZMBhPXACHC4TvfT4dwAAAP__N0Jpyw">