<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/153938>153938</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [MC][ARM] `Clang` Crashes When Assembling Invalid ARM `ldrexd` Instructions with `--triple=armv7-none-eabi`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            clang
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          venkyqz
      </td>
    </tr>
</table>

<pre>
    ## Description

When using the latest **trunk assertions build** of Clang/`llvm-mc` with the `--triple=armv7-none-eabi` option to assemble ARM assembly code containing invalid `ldrexd` instructions `ldrexd h0,r0,[r8]`, the assembler crashes with a **SIGSEGV** due to an assertion failure in `ARMAsmParser::parseInstruction` / `ARMOperand::getReg`.  

Expected behavior is to emit diagnostics (e.g., “invalid instruction”, “destination operands must be sequential”), not to crash.
---

## Interesting Facts

- **Clang 18.1.0**:  
  - Clang **18.1.0** with the same triple/inputs produces correct error messages and exits cleanly (**no crash**).  
  - This is the latest version that still works, indicating a bug introduced after 18.1.0.

- **ARM gcc 15.1**:  
  With `arm-linux-gnueabi-gcc -march=armv7-a`, GNU `as` correctly diagnoses the invalid instructions with errors such as:  
  - ARM register expected -- `ldrexd h0,r0,[r8]'
  It does **not crash**.
---

## Steps to reproduce

This issue was reproduced in Compiler Explorer using `x86-64 Clang (trunk with assertions)`，`x86-64 Clang 18.1.0`, and `arm gcc 15.1`
Comprehensive reproduce link: [https://godbolt.org/z/TW6WcqKWj](https://godbolt.org/z/TW6WcqKWj)

</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJyMVUFz4jgT_TXi0mWXkLExBw4OhCnqq3y7lZndnGWrsTWRJY8kEzK_fkuyCUl2ancvgFG3_N7r193cOdlqxC3J70i-X_DRd8Zuz6ifX3_8XNRGvG4JywjLYI-usXLw0mhCK0Krpw41jE7qFnyHoLhH54GwirDK21E_A3cObUhwUI9SiekMzAl2iuuWsAMpqFLnPukbUlB4kb6Ld5GCJom3clBIsj23_XmdaKMxQV7LEGkiDvAmvqOvFUL1-HB9eIXGCITGaM-lDgClPnMlRbhYCYsXES6R2nk7NhPAtxPoKGE7Gz5IfmdLku9JEZ4isuvrLDSWuw7dBJrPvL8ev3y9__LnTFSMGCHqmxJw4lKNFkHq8Mrq8aFy_e_cOrQkq0hWDeH38YYsACXsMAf_NqDlWkyhLfpHbElBU4CpJPeXARuPAmrs-FkaC9IFBNhLD0LyVhvnZeOAsBLTNg2syD0jJSWb3VWjd7Jcz_YfAgU6LzWPdMwEyEE_Og81gsMfI2ovuXqXvAn52viAJeqWElolSTKhng121B5tvLqFA2-8m06TWdpoGViW6TKl0z8kqyJxgGQy1Bz5PubmKcd7hNlT7CD1MHoHgzVibNBBY6zFxgNaayz06Bxv0QHXAvAivYNGIdfqNSg33axnKjMWtknfwHzrpIvK39rijNZFx3bcg_NSKXgx9tkFYaQWsuGRN4d6DG71Ey4B_OTRzqzTj4IEw7dNA8s8XX4W5CmwJgXltk-U1OMlafUYmicJGUnPbdO9dRaf_f3l_3_EHBc8NwuiXq--wYnPL1wy90CUzoEbmw64e1-cgNRiK13gglePJsk_Nx1bx_SjB2HQwVV1_172X_noq8chut7iXN7peK6KGxFeuLudBi6wM_0gQ1vfXwZlLNp5spGCXsoiKVZvDiun2Ta1_duACx4vKLk_kLsdKXef02ZLTjoHU021udWvoIRWAYTFDrWTZ7wBBCX1c9CT5Hed90PQNsxOdmiNqI3yqbFhmP4k7PDtqXhqfvzv6XtUsPzv4WxDaLUQ20xssg1f4Ha5zvMsWy0ZW3Tb1fpUMyooY3gS6zXNmxWusjrPsCjzQqwXcssoy2m5LGi5Klcs3Swx25w2AvO1WJ_4iqwo9lyqNMz7gGARS7Fd5tkmKxeK16hcXEOMNdN2YGEj2W1cEPXYOrKiSjrvbld46VXcXQ-7wDe_qx4fSL4P6k4bpqCwm-d0XFfVNL5DZY-zkYM5P6yF49-c_W_raDFatf0ktfTdWKeN6Qk7BLzzVzJY8x0bH0ZQ4O8IO8wSnLfsrwAAAP__ncldjA">