<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/153787>153787</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Recognise VPMADD52L/H patterns on AVX512IFMA/AVXIFMA targets
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    AVX512IFMA/AVXIFMA targets should be able to fold vXi64 mul-add patterns assuming the multiplicands are known to be u52 integers

X86ISD::VPMADD52L patterns can be matched for `(X * Y) + Z` if the upper 12 bits of X, Y AND (X * Y) are all known zero

X86ISD::VPMADD52H patterns are trickier as we extract the upper 52 bits of the (X * Y) 104-bit mulu extended result, but at least basic matching might be achievable
</pre>
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