<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/153556>153556</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [Headers][X86] Allow integer/fp absolute intrinsics to be used in constexpr
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            good first issue,
            backend:X86,
            clang:headers,
            constexpr
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    Once #152497 and #152705 have landed we update the MMX/SSE/AVX2/AVX512 absolute functions to constexpr

These wrap `__builtin_elementwise_abs`:
```
_mm_abs_pi8
_mm_abs_pi16
_mm_abs_pi32

_mm_abs_epi8 _mm256_abs_epi8  _mm512_abs_epi8
_mm_abs_epi16 _mm256_abs_epi16 _mm512_abs_epi16
_mm_abs_epi32 _mm256_abs_epi32 _mm512_abs_epi32
_mm_abs_epi64 _mm256_abs_epi64 _mm512_abs_epi64

_mm_mask_abs_epi8  _mm256_mask_abs_epi8 _mm512_mask_abs_epi8
_mm_mask_abs_epi16 _mm256_mask_abs_epi16 _mm512_mask_abs_epi16
_mm_mask_abs_epi32 _mm256_mask_abs_epi32 _mm512_mask_abs_epi32
_mm_mask_abs_epi64 _mm256_mask_abs_epi64 _mm512_mask_abs_epi64

_mm_maskz_abs_epi8  _mm256_maskz_abs_epi8 _mm512_maskz_abs_epi8
_mm_maskz_abs_epi16 _mm256_maskz_abs_epi16 _mm512_maskz_abs_epi16
_mm_maskz_abs_epi32 _mm256_maskz_abs_epi32 _mm512_maskz_abs_epi32
_mm_maskz_abs_epi64 _mm256_maskz_abs_epi64 _mm512_maskz_abs_epi64
```
The AVX512 fp absolute use bit logic:
```
_mm512_abs_pd _mm512_mask_abs_pd
_mm512_abs_ps _mm512_mask_abs_ps

_mm_abs_ph _mm256_abs_ph _mm512_abs_ph
```

You can use https://github.com/llvm/llvm-project/pull/152305 as reference.
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJyUVE-PuzYQ_TTmYjUyBkM4cODXLapUrSp1V9X2FBl7AHeNQdhsWj59BcmGP-FSKZIzj3memeeZ4daqygCkiP1A7MXjg6vbPv3jtzfVtMYrWvlv-rsRgBENfEbDJMbcyLsVE4Zr_gVYcyNB4ivgoZPcAXY14NfXD0Tzt7dfEM2zPz_o7WA-xbywrR4c4HIwwqnWWOxaLFpjHfzT9YhkiGTvNVjA1553GEXkcikGpZ0yF9DQgHFXZeHCC4sigoLJf_pz-5Hs0jTTt0unzhvLjzZmQG-hvhHo1BlfmoayaLEngPn0AWz9_WhHuAErwiYmTEF3jBuwYsxprRhRuGPcgBUjCpdCGm4_t9lPzC16Z2_AA_pS3DO65z_KXINLrc_o_oJH1WtwKf0Z3V-wF2E8VmE8lGE80mE8FmI8VmI8lGI81mI8FmM8VGM8lmM81mPcCrIai_ca8H0Ey26ZwsECLpTDuq2UOBym71br5JPwndy52GcXux2zrl7388160OtddESyv9oBC27mPGvnOjvlSHNE80q5eihOom0QzbX--j5-6vr2bxAO0bwbtEY09xkNCMPc4h5K6MEIOHkyDWQSJNyD1I8Z8yMSx75XpwxoEkgRSyhLTv1IAEkEcBlDVJSMCU-llFBGzn5IzkES-CdW8rAkPC6ET8IkOaOQQMOVPk3ZnNq-8pS1A6Q-CxiLPM0L0HbeuZRWbStxqXrr8OyEKEX0Z0RpwcUnGImC7OMcPVChualQkNXAJfR2wR_rk9Jpk_fprEQxVBaFRCvr7JKNU07PO__X-y3sBbEfUxj2gjOt2ytWxkEFPaL5uleUcb0yVol5ZRdz80iszLK9vaHX6f9-prlyOz_UrNBXSv8LAAD___OWLEc">