<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/153598>153598</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISCV] Verifier failure in the RISCVMoveMerger pass
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          svs-quic
      </td>
    </tr>
</table>

<pre>
    https://godbolt.org/z/jEeEcsMMe

When we run the `RISCVMoveMerger` pass on the following MIR with `-mattr=+zcmp` we run into verifier issues on using an undefined register:

```
---
name: mov-merge
tracksRegLiveness: true
body:             |
  bb.0.entry:
 liveins: $x8, $x9
    $x12 = ADDI $x0, -3
    SW renamable $x9, $x2, 56
 $x10 = ADDI killed renamable $x9, 0
    SW renamable $x8, $x2, 60
    $x11 = ADDI killed renamable $x8, 0
    PseudoRET
...
```

The error is:

```
*** Bad machine code: Using an undefined physical register ***
- function:    mov-merge
- basic block: %bb.0 entry (0x2b403d40)
- instruction: SW renamable $x8, $x2, 60
- operand 0:   renamable $x8
LLVM ERROR: Found 1 machine code errors.
```

It looks like we always insert the merged move after the first MV instruction thereby missing cases where the source register in the second MV is killed in between.
</pre>
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