<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/153156>153156</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AVR] code generation regression (mulhi3 instead of mulqi3)
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          tomtor
      </td>
    </tr>
</table>

<pre>
    ```
void mod(unsigned i)
{
  if (i > 9) {
 mod(i / 10);
    mod(i % 10);
  } else {
    c = '0' + i;
 }
}
```

Old llvm:

```
000000ec <mod>:
  ec:   ef 92           push r14
  ee:   ff 92           push    r15
  f0:   0f 93           push r16
  f2:   1f 93           push    r17
  f4:   8c 01           movw r16, r24
  f6:   0a 30           cpi     r16, 0x0A       ; 10
  f8:   11 05 cpc     r17, r1
  fa:   a8 f0           brcs    .+42            ; 0x126 <.Lname50+0x3>
  fc:   2d ec           ldi     r18, 0xCD       ; 205
 fe:   3c ec           ldi     r19, 0xCC       ; 204
 100:   40 e0 ldi     r20, 0x00       ; 0
 102:   50 e0           ldi     r21, 0x00 ; 0
 104:   b8 01           movw    r22, r16
 106:   ca 01           movw r24, r20
 108:   52 d0           rcall   .+164           ; 0x1ae <__mulsi3>
 10a:   7c 01           movw    r14, r24
 10c:   f6 94 lsr     r15
 10e:   e7 94           ror     r14
 110:   f6 94           lsr r15
 112:   e7 94           ror     r14
 114:   f6 94           lsr r15
 116:   e7 94           ror     r14
 118:   c7 01           movw r24, r14
 11a:   e8 df           rcall   .-48            ; 0xec <mod>
 11c: 8e 2d           mov     r24, r14
 11e:   66 ef           ldi     r22, 0xF6 ; 246
 120:   3d d0           rcall   .+122           ; 0x19c <__mulqi3>
 122:   80 0f           add     r24, r16
 124:   01 c0 rjmp    .+2             ; 0x128 <.Lname51>
 126:   80 2f           mov r24, r16
 128:   80 63           ori     r24, 0x30       ; 48
 12a:   80 93 be 00     sts     0x00BE, r24     ; 0x8000be <c>
 12e:   1f 91           pop r17
 130:   0f 91           pop     r16
 132:   ff 90           pop r15
 134:   ef 90           pop     r14
 136:   08 95 ret
```

Current llvm:

```
000000ec <mod>:
  ec:   ef 92 push    r14
  ee:   ff 92           push    r15
  f0:   0f 93 push    r16
  f2:   1f 93           push    r17
  f4:   8c 01 movw    r16, r24
  f6:   0a 30           cpi     r16, 0x0A       ; 10
  f8: 11 05           cpc     r17, r1
  fa:   b0 f0           brcs    .+44 ; 0x128 <.Lname51>
  fc:   2d ec           ldi     r18, 0xCD       ; 205
  fe:   3c ec           ldi     r19, 0xCC       ; 204
 100:   40 e0 ldi     r20, 0x00       ; 0
 102:   50 e0           ldi     r21, 0x00 ; 0
 104:   b8 01           movw    r22, r16
 106:   ca 01 movw    r24, r20
 108:   63 d0           rcall   .+198           ; 0x1d0 <__mulsi3>
 10a:   7c 01           movw    r14, r24
 10c:   f6 94 lsr     r15
 10e:   e7 94           ror     r14
 110:   f6 94           lsr r15
 112:   e7 94           ror     r14
 114:   f6 94           lsr r15
 116:   e7 94           ror     r14
 118:   c7 01           movw r24, r14
 11a:   e8 df           rcall   .-48            ; 0xec <mod>
 11c: 6a e0           ldi     r22, 0x0A       ; 10
 11e:   70 e0           ldi r23, 0x00       ; 0
 120:   c7 01           movw    r24, r14
 122:   45 d0           rcall   .+138           ; 0x1ae <__mulhi3>
 124:   08 1b sub     r16, r24
 126:   19 0b           sbc     r17, r25
 128:   00 63 ori     r16, 0x30       ; 48
 12a:   00 93 be 00     sts 0x00BE, r16     ; 0x8000be <c>
 12e:   1f 91           pop     r17
 130: 0f 91           pop     r16
 132:   ff 90           pop     r15
 134:   ef 90           pop     r14
 136:   08 95           ret
```

</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsWE1v4zYQ_TX0ZRBjOKQ-ePDBjuNTgQI99LqQRMrWQrZcSc6m_74QSUt0rBhp00OBrrFYB-GbD80bvmcn67pqfzJmxaINi7aL7NIfmnbVN8e-aRd5o_9csRj9P1y_NpWGY6MZpZeTjdRQMVIM1yzZMFwDVCUwSitg4gUUIwX-wEVVwGgHHIcY4QIgOIpuj1iyBVN35poDAApgYguMEmSUAKMNVB7Nkq1tw_4f9Mxw_Wutoa5fj0ys3S_Cc7QvMyR-HjoRLw4GYAomhqKmBEUwvc6X7gAtlw5kHKicAwFAyyOLK9HhsAQl7pPFDkQOxOdANlnicNLh0gKQB7hj8_rDJqNnaMk1WMa-cAYCA2xxrsDltHB8cwMGACY2Aw82OPUNccAIinMB1zaGCtxhMofJUijDAnlbdMP7ktFGhqOxBfCNUzzMfPnLKTuaCBlt8E0M47dJ_exJgymC0Fpfu05d18_bICmhHXbpORHFR8HKBz_fBNuBcfRMSQSDUwyhHxOGT-EiPG2RjZipR3yMDaI8iXk6Q6KNIjfl2ME9j0U2xzlJx7lP7WmLCHTYUFtkde0p4bG8pyQzAyXfvh0vdVddyeDoGU7m1s3OUwYbx9FzV8agJNRd64ceuVNPjkmG06C35opzWTiGWYKhdu2Yi9Mnc8lP5Io_mcvPtkge8HDF-sGZFHQ5x8OTTOGOhRstsmnsQFMz3Iabgn67bmv6-cbxIFzBs47LSG4Zd7Fbe-n2i_y8hX6wM0T3O6OKcWf-mHaGPDUpDpI3vTKtb7v21T1DyKFAaL8fz-Br3ijHKB1pIB18rBmPNal8N6n39dIRGodK27RV2B6-ifC6y9QFZ2OwEpAb8JrQ9Vbw7EXfvPgrEbSdImJub1gxtmwmxQ-36dycr2rPRWAd7zHgFdziaLIivMvltlzIydPeYyDYcnF1jRRUBK3p7131-dK25tR_3Vknd_uKpU6nX_HSSdL-bRN1FhqGPjLTHB-YqXx4Db7mnf8H85xAs64ZiwcKqELB9jRo_Oma_1XXjLOP1oo-vLGjhyYzO9mS-HCXrx46-5T3Vn31SBk9WDgxs3DBx7RDYLly1GyeQ3fJPQOhko0eyRVgHmTu8ls5oujGJ9H65OiOV7l75I44446BM_I4eKK_6Yww6bd3x694IwT37J_5Y0DdnVMu9EpoJVS2MCueRFIp5AoXh5VOZa6iSPIsiaKsyLTEWCrNpdRFbAq-qFaEFGHKCRWPBS4zpXmJpUiFVlhwwSSaY1bVy8GCl027X1RddzErHgkexYs6y03d2a_2RCfzA-wpIxq-6berIegpv-w7JrGuur6b0vRVX9u_Cax__41FWygabWBvTqbN-qo5QWv2rem64UdGqdtCqE5dbzINTQn-oyCpxaWtV4e-P3eD9dOO0W5f9YdLviyaI6Od_ezg3p7ObfPdFD2jne2zY7TzD_K6or8CAAD__0pz0wM">