<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/151814>151814</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            LLVM incorrectly emits "vsha2ch.vv" instruction for __riscv_vsha2cl_vv_u32m1 intrinsic
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          jkivilin
      </td>
    </tr>
</table>

<pre>
    I noticed issue while implementing SHA256 implementation with LLVM riscv vector cryptography SHA2 instrinsics. 

Here's test function for __riscv_vsha2cl_vv_u32m1:

```
#include <riscv_vector.h>
vuint32m1_t test_vsha2cl_vv_u32m1(vuint32m1_t a, vuint32m1_t b, vuint32m1_t c, int vl)
{
  return __riscv_vsha2cl_vv_u32m1(a, b, c, vl);
}
```

This should generate code with "vsha2ch.vv" instruction, but LLVM instead generates "vsha2cl.vv" (see https://godbolt.org/z/nbfYsGGK1):

```
test_vsha2cl_vv_u32m1:
 vsetvli zero, a0, e32, m1, ta, ma
        vsha2ch.vv      v8, v9, v10
 ret
```

GCC generates expected code with "vsha2cl.vv":

```
test_vsha2cl_vv_u32m1:
        vsetvli zero,a0,e32,m1,ta,ma
        vsha2cl.vv      v8,v9,v10
 ret
```

Likewise, __riscv_vsha2cl_vv_u64m1 and __riscv_vsha2cl_vv_u64m2 (used for SHA512) suffer from the same issue.
</pre>
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