<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/151641>151641</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [MC][AArch64] `llvm-mc` Silently Converts `x1` to `w1` for AArch64 `sxtb`, `sxth`, and `sxtw` Instructions without warning
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          venkyqz
      </td>
    </tr>
</table>

<pre>
    ## Summary
+ When using trunk `Clang` with AArch64 as the target, the assembler **silently** converts the source register `x1` (64-bit) to `w1` (32-bit) for the `sxtb`, `sxth`, and `sxtw` instructions, which expect a 32-bit source register according to the ARMv8-A architecture. 
+ This behavior can be confusing as it does not issue a **warning** or **error** to indicate that the input register is invalid, potentially leading to unexpected behavior for users.

## Steps to Reproduce
1. Run the following command with trunk `llvm-mc`:
 ```bash
   echo "sxtb x0, x1\nsxth x0, x1\nsxtw x0, x1" | ./llvm-mc --arch=aarch64 --show-encoding --show-inst
```
Observe the output:
 ```bash
sxtb    x0, w1                          // encoding: [0x20,0x1c,0x40,0x93]
                                        // <MCInst #5910 SBFMXri
                                        //  <MCOperand Reg:239>
                                        //  <MCOperand Reg:240>
 //  <MCOperand Imm:0>
 //  <MCOperand Imm:7>>
sxth    x0, w1 // encoding: [0x20,0x3c,0x40,0x93]
 // <MCInst #5910 SBFMXri
                                        // <MCOperand Reg:239>
                                        //  <MCOperand Reg:240>
                                        //  <MCOperand Imm:0>
 //  <MCOperand Imm:15>>
sxtw    x0, w1 // encoding: [0x20,0x7c,0x40,0x93]
 // <MCInst #5910 SBFMXri
 //  <MCOperand Reg:239>
                                        // <MCOperand Reg:240>
                                        //  <MCOperand Imm:0>
                                        //  <MCOperand Imm:31>>
```
2. Here is the compiler explorer link: https://godbolt.org/z/vqa1WrhvT, where I compare with GNU Gas, which explicitly diagnoses it as error
```
<source>:1: Error: operand mismatch -- `sxtb X0,X1'
<source>:1: Info:    did you mean this?
<source>:1: Info:         sxtb x0, w1
<source>:1: Info:    other valid variant(s):
<source>:1: Info:         sxtb w0, w1
<source>:2: Error: operand mismatch -- `sxth X0,X1'
<source>:2: Info:    did you mean this?
<source>:2: Info:         sxth x0, w1
<source>:2: Info:    other valid variant(s):
<source>:2: Info:         sxth w0, w1
<source>:3: Error: operand mismatch -- `sxtw X0,X1'
<source>:3: Info:    did you mean this?
<source>:3: Info:         sxtw x0, w1
```

# Suggested Fix

+ Add a warning in llvm-mc when a 64-bit register (Xn) is used as the source for sxtb, sxth, or sxtw, indicating that it has been converted to the corresponding 32-bit register (Wn).
+ Alternatively, reject invalid source registers with an error message to enforce strict adherence to the AArch64 instruction set.
Document this behavior explicitly in the LLVM AArch64 assembler documentation, if the current behavior is intentional.
</pre>
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