<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/151303>151303</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[InstCombine] Incorrect fabs + nsz fold
</td>
</tr>
<tr>
<th>Labels</th>
<td>
miscompilation,
llvm:instcombine
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
nikic
</td>
</tr>
</table>
<pre>
https://alive2.llvm.org/ce/z/FmBrma
```llvm
define float @src(float %a) {
%i32 = bitcast float %a to i32
%cmp = icmp slt i32 %i32, 0
call void @llvm.assume(i1 %cmp)
%b = fneg nsz float %a
%c = call float @llvm.fabs(float %b)
ret float %c
}
```
The fabs is optimized away here, even though `fneg nsz` can flip the sign bit of zero.
</pre>
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