<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/150569>150569</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            llvm-objdump for ARM misapplies conditional instruction suffixes to subsequent instructions when an instruction is not recognized
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          JonathonReinhart
      </td>
    </tr>
</table>

<pre>
    Consider this input code:
```asm
.syntax unified

example:
    tst r3, #0x10
    it eq
    vldmiaeq r0!, {s16-s31}
    msr psplim, r2
    msr psp, r0
    bx r3
```

Assembled with GNU AS:
```
arm-none-eabi-as -mcpu=cortex-m33 -mfpu=fp-armv8 code.s
```

If I disassemble with `--mcpu=cortex-m33` it works fine:
```
$ llvm-objdump --mcpu=cortex-m33 -d a.out
a.out:      file format elf32-littlearm

Disassembly of section .text:

00000000 <example>:
       0: f013 0f10     tst.w   r3, #0x10
       4: bf08 it      eq
       6: ecb0 8a10     vldmiaeq        r0!, {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}
       a: f382 880b     msr     psplim, r2
       e: f380 8809     msr     psp, r0
 12: 4718          bx      r3
```


If I disassemble without any `--mcpu` option, it doesn't understand the `vldmiaeq` instruction at `0x6`, which is okay (I don't know what the default ARM instruction set is).

But it does something else weird: It erroneously applies the `eq` suffix to the `msr` instruction  at `0xa`:

```
$ llvm-objdump -d a.out

/usr/local/google/home/jrreinhart/bugs/objdump-iteq/a.out:      file format elf32-littlearm

Disassembly of section .text:

00000000 <example>:
       0: f013 0f10     tst.w   r3, #0x10
       4: bf08 it      eq
       6: ecb0 8a10     <unknown>
       a: f382 880b     msreq psplim, r2    // not supposed to be `msreq`
       e: f380 8809     msr psp, r0
      12: 4718          bx      r3
```

and if I force it to Cortex-M3 (which doesn't have PSPLIM), then it moves to the next instruction at `0xe`:
```
llvm-objdump --mcpu=cortex-m3 -d ~/bugs/objdump-iteq/a.out

/usr/local/google/home/jrreinhart/bugs/objdump-iteq/a.out: file format elf32-littlearm

Disassembly of section .text:

00000000 <example>:
       0: f013 0f10     tst.w   r3, #0x10
       4: bf08 it      eq
       6: ecb0 8a10     <unknown>
       a: f382 880b <unknown>
       e: f380 8809     msreq   psp, r0      // now this instruction got the `eq` suffix
      12: 4718          bx      r3
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzkls-O27YTx5-GvgxkUJT_yAcdnN2ff9iiKYIEfQBKHFlMKFJLUra3hz57QVK21xunixY9tYKBMSjOcGb4-ZLizsm9RqzI8gNZPs746Dtjq5-M5r4z-jNK3XHrZ7URL9WD0U4KtOA76UDqYfTQGIGk2BK6JSuaftz1hG7n7kV7foJRy1aiCBPoFk-8H9TkAADgnQdbEPYAhBX0lNNpXHrA5-n_QYlecnwGSwnL49z1B5evMlfkZP04zeqdhcENSvZhhmW3w3HsHLw-hTVfZZyS2zqHfa1QwFH6Dv7_y6-w_fKmNkK33PaZNhoz5LXMuIOsb4aRFI-NsR5PWV8UkPVtHGqHjNv-UMY2zd33az618ARCOj6tnZYmK5p9H5WsaOjL0dhvDlqp3_Y9_GcLUOrQZ6b-KsZ-gDthIBPA52b0oZZoi9gVgFYqhNbYnntA1RYsU9J7hdz2KdvHS6IvYFpw2HhpNMw9nvyUDN3S6QFSPFz2-3_XLQcAGpZsaV4AbXMKEwjzI8BdGABgETzqlpahA_G54AEAq_AWm5pCyad4F2im5w074Z_L18mUyWyiYTSZPBmWTJHMIpllMikKS1FYisJSlCJFeQ0oAPBYd1EyKEtaw5nP8NxBNxQ5OdDgsHnrcIU6Z2HiYp2XcHnq01T5HdR_RJ4ZPXD98grAFQUzhF0Oi0kPwqDThK09jFqgdZ5rAb7D4HLueQRVO2_HxAf34S09rcL67AGOnWw6kA7MN_4ChJVPIEwK-k2bIxw77mNMgS0flYft5483AR16kI6wzTzV8mH059zAmR59J_UeUDmEI0orQnOePKC1RqMZnXoBPgxKojunnpJ2Y9vKE3hzHu6dfVvMpRoeqjlD_-civAouvt6NzhK2U6bhirDd3pi9QsJ2nemD-WrtdOwStqvHvSNsN4XKpMdnwnb_Xt2S4mHUgQIdFn9HOfh8o5voz3aE7UAbD24cBuNQhP2sz9sZN_pdgb29MeAvKyzIQgaJtcY2GKr3Bh7SIfyxCNAnFVz11PEDwqcvn35--kjSKeI71MGzN4dAaqJS48nfVRdeeXyVyju3QWDz93cw--ep_e8B-4NZ9_GLt9YFwTTzwvXx_PV1JWBv_L1z7G-wOxNVITbFhs-wytfLYpEX-aKcdRXjS-Rs06wXm6YtS1GUK57XTKwKutiUuJnJilG2pGu2pEXOWDnnbN3W-VoIXDLGWUMWFHsu1TwQOTd2P5POjVjlS7pcbWaK16hc_AxlTOMR4lvCWPgqtVXEOFK1oEo6765hvPQKqxvOW2PjndFLdz7nG6OFDN3i6vYqia1K8nJj7fB5RH0jMAfHoEOub_yki2eMxcbstfwNxWy0quq8H1wgMO7WXvpurOeN6YNu1OFsssGar9gEocQqg1SmNhwq9kcAAAD__zucWew">