<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/149230>149230</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [WebAssembly] Teach backend that loadv128 is good under -msimd
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          badumbatish
      </td>
    </tr>
</table>

<pre>
    In https://github.com/llvm/llvm-project/pull/148298#discussion_r2203397365 (memcmp expand support), in the type legalization stage,  `type legalization doesn't understand load i128 is load i64x2 etc etc`.

Report snippet:


> Jasmine: I can add them in but the wasm won't use load128 for now since the type legalization doesn't understand load i128 is load i64x2 etc etc. Should I let this one be in another PR ?

```
Optimized lowered selection DAG: %bb.0 'memcmp_expand_32:'
SelectionDAG has 21 nodes:
  t0: ch,glue = EntryToken
  t2: i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<0>
  t4: i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<1>
            t7: i128,ch = load<(load (s128) from %ir.a, align 1)> t0, t2, undef:i32
            t8: i128,ch = load<(load (s128) from %ir.b, align 1)> t0, t4, undef:i32
          t9: i128 = xor t7, t8
              t11: i32 = add t2, Constant:i32<16>
            t13: i128,ch = load<(load (s128) from %ir.4, align 1)> t0, t11, undef:i32
 t12: i32 = add t4, Constant:i32<16>
            t14: i128,ch = load<(load (s128) from %ir.5, align 1)> t0, t12, undef:i32
          t15: i128 = xor t13, t14
        t16: i128 = or t9, t15
      t26: i1 = setcc t16, Constant:i128<0>, seteq:ch
    t23: i32 = any_extend t26
  t24: ch = WebAssemblyISD::RETURN t0, t23



Type-legalized selection DAG: %bb.0 'memcmp_expand_32:'
SelectionDAG has 33 nodes:
  t0: ch,glue = EntryToken
 t2: i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<0>
  t4: i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<1>
  t11: i32 = add t2, Constant:i32<16>
  t12: i32 = add t4, Constant:i32<16>
            t30: i64,ch = load<(load (s64) from %ir.a, align 1)> t0, t2, undef:i32
 t35: i64,ch = load<(load (s64) from %ir.b, align 1)> t0, t4, undef:i32
 t39: i64 = xor t30, t35
            t41: i64,ch = load<(load (s64) from %ir.4, align 1)> t0, t11, undef:i32
            t45: i64,ch = load<(load (s64) from %ir.5, align 1)> t0, t12, undef:i32
          t49: i64 = xor t41, t45
        t51: i64 = or t39, t49
              t32: i32 = add nuw t2, Constant:i32<8>
            t33: i64,ch = load<(load (s64) from %ir.a + 8, align 1)> t0, t32, undef:i32
              t36: i32 = add nuw t4, Constant:i32<8>
            t37: i64,ch = load<(load (s64) from %ir.b + 8, align 1)> t0, t36, undef:i32
          t40: i64 = xor t33, t37
 t42: i32 = add nuw t11, Constant:i32<8>
            t43: i64,ch = load<(load (s64) from %ir.4 + 8, align 1)> t0, t42, undef:i32
 t46: i32 = add nuw t12, Constant:i32<8>
            t47: i64,ch = load<(load (s64) from %ir.5 + 8, align 1)> t0, t46, undef:i32
          t50: i64 = xor t43, t47
        t52: i64 = or t40, t50
      t54: i64 = or t51, t52
 t53: i32 = setcc t54, Constant:i64<0>, seteq:ch
  t24: ch = WebAssemblyISD::RETURN t0, t53
```

----

> Luke:Oh in that case yeah I think it's reasonable to start with just scalar sizes now and leave a TODO for vector sizes
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzMV1tv2zgT_TX0yyAGr5b14AfVTop8-LZZpC72MaAk2mIjkV6RiuP--gUpp0l8SRp1HzZwEAQczpw5c6GPdE6vjVIzJD4hsRjJzle2neWy7Jpceu2qUW7L3ezaQOX9xiGWIXqF6NVa-6rLx4VtEL2q64enPxeb1n5XhUf0atPVNaJXhE9pOkWUldoVnXPamruWUsxYmrCJAESnjWqKZgPqcSNNCa7bbGzrEU0RnYM24CsFfrdRUKu1rPUP6bU14Lxcq2ABaIKPj0urnEE08dCZUrXOB9e1lSVoQqeg3f6fCX-koHwRftEEjxHOEM5uVYAAzujNRvmQNX76sEv4n3SNNgqxDK6hkAZkWQaUTUCbdz4i3krXwNbuMTgV44XQK9uCsVtw2hTqTHJD0I_ha2W7uoRrqFXAoB1YoyBXAZY01leqhT9vAbGrfS4TvP_g7GbjdaN_qBBmq1pVglO1KiKaRfY55IqoyPMxBkSTvmJ3fcXuGI19kSCcfX26tMg-QyUdUALGlsr1HAJ4HFwVFaLzdd0pQGwBl8a3u6W9V6Y3Ce5AMxoP_1J55pxq8np3_XUR3LAsu_387Y_LL0tYynat_NyawFCokw5Y5hixy94V_11X5MnV849PolNCp4jOiyq6DuVAbI7oNBYG0amL5ymsWtsE6nQ7lqFdZa3XBkhob3YZ6KDzkDGdx1Kv9oEPIk4HRszPRuRvRfTpU7wY6tG2IelwbXqADMAT8pLjOAoxnWMqJye4JGxgavxsaoScyM0TegSTfwAmHwhTnIf5ZtE9Ecc1IKy_yV-Y-oD3hWGwS3sz8dPM071RNHHKF0W8eJB_gL-fHjoPZupvxLKi2vvxlL3i0Ozu1KNXpoz--9Hl_Xifnbfby-W32y8_-549L1acLXcbdbHfg__aAmLsowvov7l_hszZbzY9i1TpCX-z58Pxb6w5z8SgKB9bbZ6l-yjP08R6cyYO8-ZkEKIPbqRXEYdxMHi58GM2OOnJe8mGF-SlXSSt3y08PX4I2FGzmW57rkmnp_qNDes3QPQTTM9ywd55XUPkyUnop2flJPRkWBO_B33ydhnxcVP3TwRLYtfz0yXp-_GXEuPDasLfSYyfXAX8dBnIr7cQH1YH8R7ct-sgjuvA-zrw5NU40cNx4r1_gZ-fasEPjUQ_mqInSbx6hPdvuThq1Qk__5R_9JkW7EAtIJxdXFxcPEui_3f3QQ_dVL1gkx4K6RTslKzgOmgRcw_aI5o4aJV01si8VuBtkHGth632FXzvnAdXyFq24PQP5aJMispHyQcFEpY3i5uonx5U4e3ealTOWJmyVI7UjCSCJoRRQkbVTMpVIdIc40nKBSulEFjyPJWsZIwnKz7SM4qpwAlJMOYTQcaclmS1YklRCMrpaoI4Vo3U9ThI27Ft1yPtXKdmhKeU4VEtc1W7qJ0pNWoL8RRRGqR0O4t6OO_WDnFca-fdsxuvfR1F9wvukVjAUsmiglwW9_FbVeAxNO3DXvStrS17RQgXjdNNOeraevZhZR5huqjNYx4PM_pPAAAA__9ry2wX">