<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/149347>149347</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[LoopVectorize] Miscompilation at -Os
</td>
</tr>
<tr>
<th>Labels</th>
<td>
miscompilation,
generated by fuzzer,
vectorization
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
dtcxzyw
</td>
</tr>
</table>
<pre>
Reproducer: https://alive2.llvm.org/ce/z/gVth4Q
```
; bin/opt -passes=loop-vectorize test.ll -S
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_126 = global i32 0
define i1 @src() {
entry:
br label %for.cond232.preheader.i.i.i.i
for.cond232.preheader.i.i.i.i: ; preds = %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, %entry
%storemerge552.i.i.i.i = phi i16 [ 0, %entry ], [ %add302.i.i.i.i, %safe_mod_func_uint32_t_u_u.exit.i.i.i.i ]
br i1 true, label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, label %cond.false.i518.i.i.i.i
cond.false.i518.i.i.i.i: ; preds = %for.cond232.preheader.i.i.i.i
br label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
safe_mod_func_uint32_t_u_u.exit.i.i.i.i: ; preds = %cond.false.i518.i.i.i.i, %for.cond232.preheader.i.i.i.i
%cond.i519.i.i.i.i = phi i32 [ 0, %cond.false.i518.i.i.i.i ], [ 1, %for.cond232.preheader.i.i.i.i ]
store i32 %cond.i519.i.i.i.i, ptr @g_126, align 4
%add302.i.i.i.i = add i16 %storemerge552.i.i.i.i, 1
%exitcond559.not.i.i.i.i = icmp eq i16 %add302.i.i.i.i, 3
br i1 %exitcond559.not.i.i.i.i, label %for.inc309.i.i.i.i, label %for.cond232.preheader.i.i.i.i
for.inc309.i.i.i.i: ; preds = %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
%0 = load i32, ptr @g_126, align 4
%tobool205.not.i.i.i.i = icmp eq i32 %0, 0
ret i1 %tobool205.not.i.i.i.i
}
```
Output:
```
define i1 @src() {
entry:
br i1 false, label %scalar.ph, label %vector.ph
vector.ph: ; preds = %entry
br label %vector.body
vector.body: ; preds = %vector.ph
store i32 0, ptr @g_126, align 4
br label %middle.block
middle.block: ; preds = %vector.body
br label %for.inc309.i.i.i.i
scalar.ph: ; preds = %entry
%bc.resume.val = phi i16 [ 0, %entry ]
br label %for.cond232.preheader.i.i.i.i
for.cond232.preheader.i.i.i.i: ; preds = %scalar.ph, %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
%storemerge552.i.i.i.i = phi i16 [ %bc.resume.val, %scalar.ph ], [ %add302.i.i.i.i, %safe_mod_func_uint32_t_u_u.exit.i.i.i.i ]
br i1 true, label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, label %cond.false.i518.i.i.i.i
cond.false.i518.i.i.i.i: ; preds = %for.cond232.preheader.i.i.i.i
br label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
safe_mod_func_uint32_t_u_u.exit.i.i.i.i: ; preds = %cond.false.i518.i.i.i.i, %for.cond232.preheader.i.i.i.i
%cond.i519.i.i.i.i = phi i32 [ 0, %cond.false.i518.i.i.i.i ], [ 1, %for.cond232.preheader.i.i.i.i ]
store i32 %cond.i519.i.i.i.i, ptr @g_126, align 4
%add302.i.i.i.i = add i16 %storemerge552.i.i.i.i, 1
%exitcond559.not.i.i.i.i = icmp eq i16 %add302.i.i.i.i, 3
br i1 %exitcond559.not.i.i.i.i, label %for.inc309.i.i.i.i, label %for.cond232.preheader.i.i.i.i, !llvm.loop !0
for.inc309.i.i.i.i: ; preds = %middle.block, %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
%0 = load i32, ptr @g_126, align 4
%tobool205.not.i.i.i.i = icmp eq i32 %0, 0
ret i1 %tobool205.not.i.i.i.i
}
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.unroll.runtime.disable"}
!2 = !{!"llvm.loop.isvectorized", i32 1}
```
```
Transformation doesn't verify!
ERROR: Value mismatch
Example:
Source:
>> Jump to %for.cond232.preheader.i.i.i.i
i16 %storemerge552.i.i.i.i = #x0000 (0)
>> Jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
i32 %cond.i519.i.i.i.i = #x00000001 (1)
i16 %add302.i.i.i.i = #x0001 (1)
i1 %exitcond559.not.i.i.i.i = #x0 (0)
>> Jump to %for.cond232.preheader.i.i.i.i#2
i16 %storemerge552.i.i.i.i#2 = #x0001 (1)
>> Jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i#2
i32 %cond.i519.i.i.i.i#2 = #x00000001 (1)
i16 %add302.i.i.i.i#2 = #x0002 (2)
i1 %exitcond559.not.i.i.i.i#2 = #x0 (0)
>> Jump to %for.cond232.preheader.i.i.i.i#3
i16 %storemerge552.i.i.i.i#3 = #x0002 (2)
>> Jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i#3
i32 %cond.i519.i.i.i.i#3 = #x00000001 (1)
i16 %add302.i.i.i.i#3 = #x0003 (3)
i1 %exitcond559.not.i.i.i.i#3 = #x1 (1)
>> Jump to %for.inc309.i.i.i.i
i32 %#0 = #x00000001 (1)
i1 %tobool205.not.i.i.i.i = #x0 (0)
SOURCE MEMORY STATE
===================
NON-LOCAL BLOCKS:
Block 0 > size: 4 align: 4 alloc type: 0 alive: true address: 4
Contents:
poison
Target:
>> Jump to %vector.ph
>> Jump to %vector.body
>> Jump to %middle.block
>> Jump to %for.inc309.i.i.i.i
i32 %#0 = #x00000000 (0)
i1 %tobool205.not.i.i.i.i = #x1 (1)
Source value: #x0 (0)
Target value: #x1 (1)
```
llvm version: 4bf82aebc0da985cf6b2e70812714875e8fa78fa
Log before LoopVectorize:
```
Entering function main
br label %for.cond232.preheader.i.i.i.i jump to %for.cond232.preheader.i.i.i.i
phi i16 %storemerge552.i.i.i.i -> i16 0
br i1 true, label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, label %cond.false.i518.i.i.i.i jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
phi i32 %cond.i519.i.i.i.i -> i32 1
store i32 %cond.i519.i.i.i.i, ptr @g_126, align 4
%add302.i.i.i.i = add i16 %storemerge552.i.i.i.i, 1 -> i16 1
%exitcond559.not.i.i.i.i = icmp eq i16 %add302.i.i.i.i, 3 -> F
br i1 %exitcond559.not.i.i.i.i, label %for.inc309.i.i.i.i, label %for.cond232.preheader.i.i.i.i jump to %for.cond232.preheader.i.i.i.i
phi i16 %storemerge552.i.i.i.i -> i16 1
br i1 true, label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, label %cond.false.i518.i.i.i.i jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
phi i32 %cond.i519.i.i.i.i -> i32 1
store i32 %cond.i519.i.i.i.i, ptr @g_126, align 4
%add302.i.i.i.i = add i16 %storemerge552.i.i.i.i, 1 -> i16 2
%exitcond559.not.i.i.i.i = icmp eq i16 %add302.i.i.i.i, 3 -> F
br i1 %exitcond559.not.i.i.i.i, label %for.inc309.i.i.i.i, label %for.cond232.preheader.i.i.i.i jump to %for.cond232.preheader.i.i.i.i
phi i16 %storemerge552.i.i.i.i -> i16 2
br i1 true, label %safe_mod_func_uint32_t_u_u.exit.i.i.i.i, label %cond.false.i518.i.i.i.i jump to %safe_mod_func_uint32_t_u_u.exit.i.i.i.i
phi i32 %cond.i519.i.i.i.i -> i32 1
store i32 %cond.i519.i.i.i.i, ptr @g_126, align 4
%add302.i.i.i.i = add i16 %storemerge552.i.i.i.i, 1 -> i16 3
%exitcond559.not.i.i.i.i = icmp eq i16 %add302.i.i.i.i, 3 -> T
br i1 %exitcond559.not.i.i.i.i, label %for.inc309.i.i.i.i, label %for.cond232.preheader.i.i.i.i jump to %for.inc309.i.i.i.i
%0 = load i32, ptr @g_126, align 4 -> i32 1
%tobool205.not.i.i.i.i = icmp eq i32 %0, 0 -> F
ret i1 %tobool205.not.i.i.i.i
Exiting function main
```
After LoopVectorize:
```
Entering function main
br i1 false, label %scalar.ph, label %vector.ph jump to %vector.ph
br label %vector.body jump to %vector.body
store i32 0, ptr @g_126, align 4
br label %middle.block jump to %middle.block
br label %for.inc309.i.i.i.i jump to %for.inc309.i.i.i.i
%0 = load i32, ptr @g_126, align 4 -> i32 0
%tobool205.not.i.i.i.i = icmp eq i32 %0, 0 -> T
ret i1 %tobool205.not.i.i.i.i
Exiting function main
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsWk9zqzgS_zTyRWVKSMbggw8ksQ-7eZPaJPuq9pQSIBzNCMRKIpPk029JYBtsE5OXTHYOec_lWEj979et7pYKqjXflIwtQXABgqsJrc2jVMvMpM-vL39OEpm9LG9ZpWRWp0wBEsNHYyoNSAzwGuA1FfyJYU-Ip8KTagPwOmUAr18BXm9-msfZvwCKwRy1HxQDcgETXgK8lpWB04pqzTQgV0LKavrEUiMVf2XQMG08IeD0DqDYULVhBmbUUEFfZG0gIFcQYMymBSAxm1Y4RIDEBLsvO_T7Q_trPnNfU7774eMIkNjH0TSPUPurdI_mW_L5bHpnl2G818MoXgm21eE5mj_MZ9O6_KOUf5ZTwcv6ebop64bEfmZo8-DjuSPYCJlQATnBEDXTGct5ySD3IZghrVJgpS0gCC8Aillp1IvFGsUQJgoKmjABAQ5yqbxUlhkm2KsUe2Q0Y8rjzf-G8dtLSAytKyrFMt2aEmias4dCZg95XaYPNS8NwQ_moX6oPfbMzY4WX9rVjW4odpRGKlYwtWFBgLfrHNvqkUPuzyEILiDqUkIQXLlxcGGf0SwjCB-IGKmQY9UixH1oVM0sgx1Y77BrR2OR83IqNPN44Ed9aIcmT4F6zlN9v45V1akxdvEptYZMaIA_q_SWAw_8xbG_Ce75e0BWNwL8MYJ3fnbh1og5oYdlVRkFtxvPjqngmxLOHPVRtDnFaZY1gToQzZaL35pu0bVig2DhldL0-PC0qCD775bXcVyTTqgO8-oFo0WFlylBi8HpEcnggMNHMkALI3J0QtLMOmME7kYmUgqMgmHYGqe60EGOTDHTQnWS2toXXh1UmZvaVLVpEmf3-ehk27jHxWw_laRUUOVVj72nTd2yTx3Y--EpjHd5s7fxWxpbb3tM3AMSw1H_jmR1FetuG3TOV13VCp5lgnmJkOkfjW69JyOVG9Kttfi4vB2Ea5PxdvC_jSzAQZJ6ium6YN4TFSNK0ddU2G74vG-_ja6yh7ZvRW1Ffxfe78L7XXi_oPA6YH13MrKnGztA76rGvTT77oTx9yvQKLYQOG4Z14aXqbGg2OproWnwagPSxy0R9v0Wj3YhwHiHqVeXSgrhqbo0vGBexjVNBLNnry01foOa692JM7M0-NKZ5-_17Z5c-8N7RUudS1VQw2UJM8l0CXBo4BNTPH-xohzN6vb25ta69ycVNYMF1wU1adsprJ5pUQnWNioovpO1Stn2wAfICpAV_EddVNDIMenhrX3U4kCeEUIIAhwhgBcDcsaH2VAu6ElDCNn4iPxG4skd2iXoLz638R3RGYPO7FSCz4Bnlwxp-BEAW8mDCbUvdRSQh0SWdYRHgNkn_CCg5DygZEjLD-FJ3saT_AqePSJiCcg4PPeE5wLmZMfb2gEwQW-r_XbqPvSnTTQ3_769XMEfqx83t_-Bd_fx_cpdzl394gfFv938Nr2-uYyv4cX1zeU_75okdmFrF0TOYLTQ_NUmN1tuFq7w7AdCptC8VG4aNdNPbuCaSrSgWaaY1i1BfClLw0qjGymV5FqWbY5G8b27p2uz6DHU_UPR4PzuYHK84uBE9Bn-7PpnjD-7_m-qBnyyBcY1Egf-bvDoz3fpu2XNFkdbwjSXjXeSPMKUJSnK6CIK0nyeYBaiyMehP4vCgEU5DaOcNshfyw1MWG6bxGspq5_b6np8El-VhilebqDd0K6CFpSX7zuFwd_HV8b9EWmoPE6tB-0K9EVHmq767-nr4L7XP1V4GztcG_Phlv0DHfsez89p3ht-66_t4f-iCPO_I-xTIwx_R9hBhOHvCPvUCCOfGGH3_98IO-pK3ndTcOib918adPfZ-buD1TM3p_qEbjMR54apj3Ucv3Lb30W231QO3OyfINh1mZ9wOd9lf9Sivn29_pcFCWo3zi_FyP0nxsgkW5JsQRZ0wpZ-GOBwHs2jaPK4JDjws4jMM8rmSZRlfkAXeZiylFBK5yma8CVGOEChH_pz38eRh2iehD7BJPQztJjNwAyxgnKxewtiwrWu2dKfLcgsnDjYtXvBAuOC61QWFRfu2qi5dAIYb1jJFDUsg8kLzOvXV6Z2c9s7qh1FcDVRSytrmtQbDWZIcG30XrrhRrgXOvo7IriCP3rSITVweqMntRLL_lsdG24e68RLZQHw2vJt_0wrJX9nqQF47UzUAK9bK5-W-H8BAAD__-Tn8-k">