<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/145284>145284</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Vector-AND's with constant Vectors of <i64 {DDDD}, i64 poison> should not load the constant in through GPR's
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
Validark
</td>
</tr>
</table>
<pre>
[Zig Godbolt](https://zig.godbo.lt/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:14,fontUsePx:'0',j:1,lang:zig,selection:(endColumn:14,endLineNumber:3,positionColumn:14,positionLineNumber:3,selectionStartColumn:14,selectionStartLineNumber:3,startColumn:14,startLineNumber:3),source:'const+std+%3D+@import(%22std%22)%3B%0A%0Aexport+fn+foo(a:+@Vector(16,+u8))+@Vector(8,+u8)+%7B%0A++++return+carryless_multiply_x86(a+%26+@as(@Vector(16,+u8),+@splat(1)),+@splat(0xFF))%3B+%0A%7D%0A%0Afn+carryless_multiply_x86(a:+@Vector(16,+u8),+b:+@Vector(16,+u8))+@Vector(8,+u8)+%7B%0A++++return+@as(%5B2%5D@Vector(8,+u8),+@bitCast(struct+%7B%0A++++++++extern+fn+@%22llvm.x86.pclmulqdq%22(@Vector(2,+u64),+@Vector(2,+u64),+i8)+@Vector(2,+u64)%3B%0A++++%7D.@%22llvm.x86.pclmulqdq%22(%0A++++++++@bitCast(a),%0A++++++++@bitCast(b),+0)))%5B0%5D%3B%0A%7D'),l:'5',n:'0',o:'Zig+source+%231',t:'0')),k:52.428234686299206,l:'4',n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:ztrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:14,fontUsePx:'0',j:1,lang:zig,libs:!(),options:'-OReleaseFast+-target+x86_64-linux+-mcpu%3Dznver5',overrides:!(),selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+zig+trunk+(Editor+%231)',t:'0'),(h:tool,i:(args:'-iterations%3D1',argsPanelShown:'0',compilerName:'zig+trunk',editorid:1,fontScale:14,fontUsePx:'0',j:1,monacoEditorHasBeenAutoOpened:'1',monacoEditorOpen:'1',monacoStdin:'1',stdin:'',stdinPanelShown:'1',toolId:llvm-mcatrunk,wrap:'1'),l:'5',n:'0',o:'llvm-mca+zig+trunk+(Editor+%231,+Compiler+%231)',t:'0')),k:47.57176531370081,l:'4',m:100,n:'0',o:'',s:0,t:'0')),l:'2',n:'0',o:'',t:'0')),version:4) [LLVM Godbolt](https://llvm.godbo.lt/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:14,fontUsePx:'0',j:1,lang:llvm,selection:(endColumn:1,endLineNumber:12,positionColumn:1,positionLineNumber:12,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:'define+dso_local+%3C8+x+i8%3E+@foo(%3C16+x+i8%3E+%250)+local_unnamed_addr+%7B%0AEntry:%0A++%251+%3D+bitcast+%3C16+x+i8%3E+%250+to+%3C2+x+i64%3E%0A++%252+%3D+and+%3C2+x+i64%3E+%251,+%3Ci64+72340172838076673,+i64+poison%3E%0A++%253+%3D+tail+call+%3C2+x+i64%3E+@llvm.x86.pclmulqdq(%3C2+x+i64%3E+%252,+%3C2+x+i64%3E+%3Ci64+-1,+i64+poison%3E,+i8+signext+0)%0A++%25.sroa.0.0.vec.extract.i+%3D+extractelement+%3C2+x+i64%3E+%253,+i64+0%0A++%254+%3D+bitcast+i64+%25.sroa.0.0.vec.extract.i+to+%3C8+x+i8%3E%0A++ret+%3C8+x+i8%3E+%254%0A%7D%0A%0Adeclare+%3C2+x+i64%3E+@llvm.x86.pclmulqdq(%3C2+x+i64%3E,+%3C2+x+i64%3E,+i8+immarg)+%231%0A'),l:'5',n:'0',o:'LLVM+IR+source+%231',t:'0')),k:50,l:'4',n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:llctrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:14,fontUsePx:'0',j:1,lang:llvm,libs:!(),options:'-O3+--mtriple%3Dx86_64-linux+-mcpu%3Dznver5',overrides:!(),selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+llc+(trunk)+(Editor+%231)',t:'0')),k:50,l:'4',n:'0',o:'',s:0,t:'0')),l:'2',m:100,n:'0',o:'',t:'0')),version:4)
```llvm
define dso_local <8 x i8> @foo(<16 x i8> %0) local_unnamed_addr {
Entry:
%1 = bitcast <16 x i8> %0 to <2 x i64>
%2 = and <2 x i64> %1, <i64 72340172838076673, i64 poison>
%3 = tail call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %2, <2 x i64> <i64 -1, i64 poison>, i8 signext 0)
%.sroa.0.0.vec.extract.i = extractelement <2 x i64> %3, i64 0
%4 = bitcast i64 %.sroa.0.0.vec.extract.i to <8 x i8>
ret <8 x i8> %4
}
declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8 immarg) #1
```
Compiles to:
```asm
foo: # @foo
movabs rax, 72340172838076673
vmovq xmm1, rax
vpand xmm0, xmm0, xmm1
vpcmpeqd xmm1, xmm1, xmm1
vpclmulqdq xmm0, xmm0, xmm1, 0
ret
```
Should be:
```asm
.LCPI0_1:
.zero 4,1
foo:
vandps xmm0, xmm0, dword ptr [rip + .LCPI0_1]{1to4}
vpcmpeqd xmm1, xmm1, xmm1
vpclmulqdq xmm0, xmm0, xmm1, 0
ret
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsWU9z27gO_zT0hRMPRf3NwQdLTvbtTF_baeb1sJcMJdE2t5SokpTj5NO_ISnJkv-mnb7dd1iPx44AEAABEPjRIUqxTU3pAoQpCFcz0uqtkIuvhLOSyG-zXJSvhvcH28DfRJkLrkG4AjjZat0o4C8BfgT48Y1t5hvDnnNtKf7G8jyAE4CTyw9b4C8LUdKHkmkhAc6Y5SZrxmlNKmqfYg_gGOBsLWr9VBBuqF7QEf6j6Oe9E0NO7E_DBjjjpDa23tgG4ExRTgvNRO3007rMBG-ruldF6_IDq-nHtsqpBP7SBzhrhGJmyVSyp56IDyaeNJF6umjKO116ZsU5wXvDEK0susAUolYa4FTpEuAU4NBfme8AsaoRUtsYhxhbdoixVRD6RhAt7QfdO7l0XZsPIQBOiNVttHylhc1K4kUAZwCnbWJV3B-xkwnXqI97G-nwllS30lgpiJSvnCr1XLVcs4a_Pu-TyBq2a3Hk1BNl_L_sRebEVMOJ2anXu3ZER_vHx55l9z5sP14dArG-4dmtkJg_8_9x4IaY4DBMsflcXVbWRSFnOiOmRhKlZVvoi1bGb7rX1Fpcd2Zt9XC-q-b7JJo3Ba9a_r383hXVJEm48yIKxm5cY7PkNDBHYoeaHfsZxqv5O5y7ttNJhEjv0nsX5MMeUJ_ee5sc5JIzPmum2GInz93hDV27qifNS7inP0zTSruj7k6F33VBPZbvKv4b8Jchngc4wX4QJRG-v8coOpgKrphyD6aXozPas_Mdu2oYp6N-PVD85ZuWbf3NdGfGNZVuSCT5xHTOaiJfJ83dkT7lf9JCTxiFqCpa6081f53oKGnebjLCuZqIl7Qi9YbTqSyTpv3uqJqQ6Z4WrZ4OGVZryidSnOWSyNdMlFOlWrJqsnRHZS4UXTkPWL05juWak436yujLp4bWv2y0cZarUYaMIdGYWdNt9u7TF8opUfTRVm16p4ncUPPXPomeo-COs7rdG0ZVNK0dIm_1jsquPsWOSslKemzj2kQ9M1C9swP10jz1rszT6-PUOx2nZ6epdzRNvXefTYBTG_i0K_QU4KTHL8NJvT9_WLPuBGkh-OH0ELnpc8U0lcQlzySiKw8j8JnUlD9txcvUqf7kfRzQ0sQ5W-bWOVZ2sfjBWqtETQrhNvgvolJK62WrhSlhWk6KeCx5UuGO-aRLNqWrA2VEON5s3_uE4L8bo6bd31UF6XvNiyTNWPKdqezVvCulps9nQ-e7lem-LQfxPIy9OAp9z48RSryTrmyaiIfQz_Xn0UbxzSZ_bvGOSuUOsRm1EITphw9f_30N7NtR-_-K9o1zP9Gc8I91J_yXtyeA45KuWW3QQKnEMxcF4R3mzxLTyzskFfoPDqY4MG_5BoUeC-AQhw61pFbXc1ubFJTPpCzlBCU-1Lqb1SNcFOLQG105cqYLN11uGUy16KVwL2RQnpWaGsAjA6QuLy8b_Ml6GctLY-wHyItx4icojqLY7wCnZTaCKVGfNeyPDGvCuL0acH7NgQCdQ6DJVYfxyOHzMv1G7ryLnvcIOrUX-b0ewOh0S3MlBZmjOZrvaDGney1JoedstNGORjk1cOtWsCehRMfWgrOl4YRvuHMoj5OqHmxIqq-UfufA6R2vpAUnkv66NF7J3pAWVlVEbob7nR0Z1qH3TynTkAFOf__yw1cC9PdcATgv_rkE_FWXgG7i3b4FmK52d1dpyRpO7en8B___JP7nvHAgsSvz-x-7Bfza83kKAd-FKG-DQYCW5h0h97aFZrqogSFwACEQ-FkC95AlwH-AB-BhUMCB7MAGPIUaEMQpGIEMtIRG2oPAX8FudsBTZVALQ8WGGAXAf-gXYruQ1OWUbXUCnBkqiwJ4DhoYUdgN14NC3yo0MAAaEHCs9tLEODaOO-NjqnPFDvcj24aQwG6kQ-SSYd25MDmtk9MRfhqAYZOo1xZMwmxYV0y4kA-5tjok1UcFYIYvWoJ45cqnG7o_E7aTiHVhGUYqBOaUTavUPXb3NAW1cEU1FiHK1LEpU39pVPRFa_bjXpXYkVxBKMne2DwtloPorhK77xDCfVXZPJolI25jKtFyzXEcf3sTsaJq6Peyf-6VTb4n4l3IBvFT7Tjr0uxeBjOdhOlpK1pewpxeCtL8Q_b5d_Ts9SfTveZvVAoIoZlR3hDKsYOkLht16lj5ImQJGy3NPVOyBgKcwsFGuAJx6mkRuOL5-4IzKxd-ee_fkxldeHGIogh7EZptFygqirgMch-Fvk_XRZLQEK8RTlCcxDgPZmyBEQ5RhH0UIxygebT2CrpOKE4KTCJEQIBoRRif2_IXcjNjSrV04QUhToIZJznlyv43DuOavkDLBRiDcDWTC_t7Rd5ulDk_TGl1UKOZ5nThfkC_W35cARwr-ML0Ftp_EpFaQ8dUUKz71gPidLVarUy8j1sQVK42aqEhF6SEeksPqlgN9VaKdrOFv33-YmzNWskX0x8KNkxv23xeiKr71aD7umuksAgPP9rtKYAfu_3vFvi_AQAA___BpcGS">