<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/144861>144861</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[X86] bcmp with zero not vectorized
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:X86,
missed-optimization
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
nikic
</td>
</tr>
</table>
<pre>
A bcmp with an all zero value results in a sequence of ors, while a bcmp with all ones uses vptest.
https://llvm.godbolt.org/z/c15xY8nKv
```llvm
@zeroes = private unnamed_addr constant [64 x i8] zeroinitializer, align 1
@ones = private unnamed_addr constant [64 x i8] c"\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF", align 1
declare i32 @bcmp(ptr, ptr, i64)
define zeroext i1 @test_zeroes(ptr %x) {
%bcmp = tail call i32 @bcmp(ptr %x, ptr @zeroes, i64 64)
%icmp = icmp eq i32 %bcmp, 0
ret i1 %icmp
}
define zeroext i1 @test_ones(ptr %x) {
%bcmp = tail call i32 @bcmp(ptr %x, ptr @ones, i64 64)
%icmp = icmp eq i32 %bcmp, 0
ret i1 %icmp
}
```
```
test_zeroes: # @test_zeroes
mov rax, qword ptr [rdi + 24]
mov rcx, qword ptr [rdi]
mov rdx, qword ptr [rdi + 8]
mov rsi, qword ptr [rdi + 16]
or rsi, qword ptr [rdi + 48]
or rcx, qword ptr [rdi + 32]
or rcx, rsi
or rax, qword ptr [rdi + 56]
or rdx, qword ptr [rdi + 40]
or rdx, rax
or rdx, rcx
sete al
ret
test_ones: # @test_ones
vmovdqu ymm0, ymmword ptr [rdi]
vpand ymm0, ymm0, ymmword ptr [rdi + 32]
vpcmpeqd ymm1, ymm1, ymm1
vptest ymm0, ymm1
setb al
vzeroupper
ret
```
The bcmp expansions look like this (https://llvm.godbolt.org/z/Tba34zYod):
```llvm
@zeroes = private unnamed_addr constant [64 x i8] zeroinitializer, align 1
@ones = private unnamed_addr constant [64 x i8] c"\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF", align 1
define zeroext i1 @test_zeroes(ptr %x) {
start:
%0 = load i256, ptr %x, align 1
%1 = getelementptr i8, ptr %x, i64 32
%2 = load i256, ptr %1, align 1
%3 = or i256 %0, %2
%4 = icmp ne i256 %3, 0
%5 = zext i1 %4 to i32
%6 = icmp eq i32 %5, 0
ret i1 %6
}
define zeroext i1 @test_ones(ptr %x) {
start:
%0 = load i256, ptr %x, align 1
%1 = xor i256 %0, -1
%2 = getelementptr i8, ptr %x, i64 32
%3 = load i256, ptr %2, align 1
%4 = xor i256 %3, -1
%5 = or i256 %1, %4
%6 = icmp ne i256 %5, 0
%7 = zext i1 %6 to i32
%8 = icmp eq i32 %7, 0
ret i1 %8
}
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsV01z4jgQ_TXi0hXKliVjDhzIUFz2Ooed05RsN6CNbDmS7BB-_ZZkzFcMu0nNbSaVsjB-_flafkhYK7c14oLwZ8JXE9G6nTaLWr7IYpLr8n2xhLyoGniTbgeiBqEUHNBo6IRqEQzaVjkLsgYBFl9brAsEvQFtLKHf4G0nFYK49KEU6BottBYtdI1D66YkWpJouXOusSRZEromdK1UV023usy1clNttoSuD4Sui5jvf2T1X523SaP-32P9PYt8bmiBJCtojOyEQ2jrWlRY_hRlaaDQtXWidkD4c8pgDzIjfBVKkrV0Uih5QONTF0pua4h7tyHjzzotCKWEf1uv_1y-fqH0hoxoWWKhhEGQCQXCIj9bhGaNC7QdF5kyQucDfiNrDBzj3oGMvZWfu5_9tPTGQCjfEzoHMnsm0RL8fRhbT7sTUkHhZ_dD0KNdiAynCTzmAEMawZ0c3IUP-No768N4gygADfY59nhfwmz1X4X4-fy1ZfQef3kRw47tC7q8vSQkWcKDP0KTWwajk0Glu7AaEap5fdOm7Gviz6aUQOgzUEb4asymGLW5Ay7vB8g-mhgr78Lj9BqvTb8-smFDjBN4PPkATuidAL2Nj3P18FHz-L1kH_SDRbfJ9mAf564nn9z5oUWHfhXKf2nQDSMTBvXxwFyPTDA4O-4q3ZWvLbxXVeTDvlfVQ_67RtQlwCX-jt1167umqBp8LQc_71UVH-3O62UYn-xVmPDYosvPfRjAfhu0TYPm4su-Rzc77vsOezHGfSNqK3VtQWn9Akq-ILidtEBo9r-U-HsuEnb4oUv_ckiWf_T4t7iM6vEX9NU6YZzft4OuRIFPpUUJkvL0JEVHWTpHDOg4oLfoUGGFtfNQmd0aefFK6GBD70aIRyIkAa1NwIYEPci7GRDsLIM1nmDJWQQJ5TxgDkNfvJHTXjIHQDqmpXxMSNNeReEonV_6OTB0_fNNP_V8f9uSp_i6wZ8jJbmbAR0hhX1IIblOgd-yFh9ZYyMNv2CNX7E2u2UtvWEtG2NtNsZaNvrbZ1IuknKezMUEF_GMRwlNGWOT3WKWzOIZT7jY5Jt8w1MqGBVMiDLDmLNZOZELGlEepfE8mrMZZdM5m2-ijGabKE8jGgvCIqyEVNPw2tZmO5HWtriIGcvSeKJEjsqG8x6luShesC5Jsvw7S_utTSitpLVYPunGyUoehJO6Dm_O1cQsvNOnvN1awiIlrbPnME46FQ6S3hdfXZz5woGx1g46LJw28oDlpDVqcS0zW-l2bT4tdHXUnOPy1Bj9DxaO0HWoxBK6PhbTLei_AQAA__-fYgas">