<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/144489>144489</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Remove lowerToAddSubOrFMAddSub  and update test coverage
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    lowerToAddSubOrFMAddSub is a x86 DAG lowering that tries to vectorize fadd/fsub code into ADDSUB + VFMADDSUB/VFMSUBADD vector instructions but SLP/VectorCombine should now be vectorising these patterns leaving the backend code superfluous.

Very similar to #143000

So, this task involves:

- Disable lowerToAddSubOrFMAddSub 
- Review all CodeGen/X86 test changes
- Convert the changed CodeGen/X86 tests into similar PhaseOrdering/X86 tests to track the vectorized IR (for the various SSE/AVX/FMA3/FMA4 targets)
- Replace the CodeGen/X86 test coverage with the real vectorized IR
- Remove lowerToAddSubOrFMAddSub and all its support methods
- Handle any CodeGen regressions (maybe a cost model, transform or backend fix)
</pre>
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