<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/142321>142321</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Missed optimization: passing vectors with different (compatible) target features prevents inlining
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
tgross35
</td>
</tr>
</table>
<pre>
This source:
```llvm
target triple = "x86_64-unknown-linux-gnu"
define <2 x i64> @vec_entrypoint(<2 x i64> %a, <2 x i64> %b, <2 x i64> %keys) #4 {
%r = call <2 x i64> @vec_callee(<2 x i64> %a, <2 x i64> %b, <2 x i64> %keys)
ret <2 x i64> %r
}
define internal <2 x i64> @vec_callee(<2 x i64> %a, <2 x i64> %b, <2 x i64> %keys) #0 {
%t1 = call <2 x i64> @simd_wrap_pclmulqdq(<2 x i64> %a, <2 x i64> %keys)
ret <2 x i64> %t1
}
define internal <2 x i64> @simd_wrap_pclmulqdq(<2 x i64> %a, <2 x i64> %b) #3 {
%r = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %a, <2 x i64> %b, i8 0)
ret <2 x i64> %r
}
attributes #0 = { "target-cpu"="x86-64" }
attributes #3 = { "target-cpu"="x86-64" "target-features"="+pclmul,+sse,+sse2" }
attributes #4 = { "target-cpu"="x86-64" "target-features"="+pclmul,+sse,+sse2,+sse3" }
```
Emits the following suboptimal code:
```asm
vec_entrypoint: # @vec_entrypoint
movaps xmm1, xmm2
jmp vec_callee # TAILCALL
vec_callee: # @vec_callee
jmp simd_wrap_pclmulqdq # TAILCALL
simd_wrap_pclmulqdq: # @simd_wrap_pclmulqdq
pclmulqdq xmm0, xmm1, 0
ret
```
The middle function `vec_callee` doesn't have any target features enabled, and that seems to break inlining. Inlining should remain possible, however, since there can be no ABI change across the functions.
Using pointers rather than a vector return type generates the expected code:
```asm
ptr_entrypoint: # @ptr_entrypoint
movdqa xmm0, xmmword ptr [rsi]
pclmulqdq xmm0, xmmword ptr [rcx], 0
movdqa xmmword ptr [rdi], xmm0
ret
```
Repro: https://llvm.godbolt.org/z/54bEjqPjj
This issue was discovered at https://github.com/rust-lang/rust/issues/139029
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJy8VltvszgQ_TXOyygRmEvCAw9J00iVutJq1X2uDJ6AW2NT2yTp9-tXBjbNbdvu7UNIWNgzZ-bMmQFmragUYk6SFUnWE9a5WpvcVUZbGyWTQvP3_KkWFqzuTIkkWpKgv9NguKXcNSRYOmYqdOCMaCUCidZAKD0s0uc0nnbqVem9mkqhusO0Uh2hdPDCcSuUP35H4QAijUl0DyQOdlg-o3LmvdVCOUIXFydowgi9u7SjSXHz7Su-W0IzIDSKgcxXJFiCf2_6OEsm5e0I_A7if4Tegxp01weM52K-PmNEKIdGsZ8RmKclOKXFhZ_wYkXDn_eGtc9tKZtOvvG378fxJRUu_Ftc_KtgijH36LuS8EqfHRbp7J-B3YFYQPB9JTDnjCg6h3askO-p-cr31dBs07LtOylaD602TWNCKQwOzq2j71sf97fIXGfQHg8RuhoyJ_SO0JW1eFzQvwKO_3_gcRV9hHCcTQOR941wFlyNsNVS6r1QFdiu0K0TDZNQan5jrDHrp9rFHIqWPqcbA8pXdLgavWOtBTg0TehrfmgaerL90rT986OLe49Py4fHu-Xj4wg59nd0NLt5nYQyGlzj3OiQKx8n4Lca6nYUI_gtg2AJl2CHpglGNnpWgpNQDbrrmj3VCI3gXCJsO1U6oRWQ9DTXNACu0SpC5w5qtkNg6h3Gz9CfEgJUrJDIPSZTHFzNHFjExoLTUBhkryCUFEqoagYP4wpsrTvJwWDDhIJWWysK6UUHtd7jDo1fWqFK9LIyCCVTUCAoDcvVA5Q1UxUCK_1HdBDemIOdDen9bj1Mrx00Fgzzbnx0CpjXhtPG89IZBe69RahQoWG-p7w3PLRYOuSfSrd15rZ0LzbOpMvf2Fmx9tpwaJ0BkqyMFSRZf1HdM4Py4A0uyn2CcnaYi_Fw7-0LefyGrdE-p9q51noK6IbQTT-hK80LLd1Mm4rQzQ9CN0lc3L-8_fry0gtLWBDWdgh7ZoELW-odGuTA3IW3Sri6K2albgjdmM66qWSqGteEbnovltBNGGUBzSY8j3gWZWyCeTiPF4swzLJoUudpEYSLZEuLkGPGgyKdx0kSJLTM4jgIo2IichrQJEiDkIZBGkUzVvJokWYRLeZZgGVM4sBLUc76BLWpJj12HsY0ouFEsgKl7X_hKFW4H_LzgzNZT0zujaZFV1n_DRPW2Q83TjiJ-S_CWuTQD0Txg3mhem5b_3OoqlGPFvbC1cDFdosGlQNCF6VuWuaG3siueq81uEPl7LHDJp2R-Scc97-Sw2PaGv2C5TnNQ7a7nP4RAAD__08WISM">