<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/140780>140780</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Illegal copy from vector register to SGPR with outgoing inreg argument derived from allocas
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            crash-on-valid
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          arsenm
      </td>
    </tr>
</table>

<pre>
    ```
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s

declare void @user(ptr addrspace(5) inreg)

define amdgpu_kernel void @v_multiple_frame_indexes_literal_offsets() #0 {
  %vgpr = call i32 @llvm.amdgcn.workitem.id.x()
  %alloca0 = alloca [2 x i32], align 8, addrspace(5)
  %alloca1 = alloca i32, align 4, addrspace(5)
  %cmp = icmp eq i32 %vgpr, 0
  %select = select i1 %cmp, ptr addrspace(5) %alloca0, ptr addrspace(5) %alloca1
  call void @user(ptr addrspace(5) inreg %select)
 ret void
}

declare noundef range(i32 0, 1024) i32 @llvm.amdgcn.workitem.id.x() #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```


```
# After Eliminate PHI nodes for register allocation

*** Bad machine code: illegal copy from vector register to SGPR ***
- function: v_multiple_frame_indexes_literal_offsets
- basic block: %bb.0 (0x15384d338)
- instruction: $sgpr0 = COPY killed %17:vgpr_32
LLVM ERROR: Found 1 machine code errors.
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJyMVNFu4zYQ_Br6ZSGDIq1IftCDcj5fD7jrBSmuQJ8MilzJbChSJSkn-fuCkpI4RdEGkGFC2Jmd0c5ShKB7i1iT4pYUh42Y4tn5WviAdti0Tj3X5IauD20Iv4X7n78S3oAxErIhej0aJPwgBtVLm4lBpd85CMgGOU6EH_ruaU8pZBf0unvOBiHP2qK2IfoAhH8CwoqQuGmjUBrhES5OKyA7OgX0hFVj9CCU8mEUEgmrCsL2oK3HnrD9C7LTFiGpGKfTA3qL5pXmchomE5PQU-fFgCdtFT5hOBkd0Qtzcl0XMAbCqsRMGKdAyltCG0jiLv3ogfADSGEMaM4SpzGXYbuY3j46_6AjDluttk8LyQtWGOOkoDN8OQMpbhk8JR5SHAj7BMLo3kI1H__h8j1Nfk2T8K_g3X-B5TDOQJ0O-NfiYLGVYPSlLqBBGefS9ajzFZ_q_nUKbxb_vySfG80f8cMDftO1GvIYZ3Qae3l4HxvrJquwAy9sn2iS0VlXTtlupvzQ7FIA8oVZxOh1O0UMayr4ISVj7vSorYJFw_uy_KosuW2FfADrOo9JYni28g0fRpSTEVG0BuFRG-MxTt7CgIPzz4RV1lmcNS1mr3dxea7fMA5NF9HDZ6MHbUVEuPvlK1inMEDnPHjsdUgFy0SidnalYesDt0LBuqMgncK069oY7IUB6cZn6Lwb4IIyXvNFB799ubuHVx5Cmwy6ycq5B2_gw0uYgK0IWkJrnHxIWMKKtt1SIKyiT3nBq53ifF2zDOarZHptRNgu9KNfhvXpx90f8JD0q8SSl4Q3Kfgnzghtvn37_Tt8vr__cZ-AxxQfyN-5B_Te-bC9_tIbVXO153uxwTovd2V5c0NztjnXlO-LPd_xXJUVdnvOdyXmolA3ec5Z2YmNrhllBS0YzSvOOdt2lWKioB2vKmyl4mRHcRDabOeIOt9vdAgT1vmOlhXdGNGiCfNdzViKFVpFeNN8P3y5-0lYuhAIY9KLcM6czS7CaJVeF4eNrxNl1k59SBugQwxvTaKOBuuvH57yo45ncFPsnbb9uqjC99OANoJCry-oFoYlZ2EzeVOfYxwD4Q1hR8KOvY7nqd1KNxB2TErWv2z07s9534-z90DYcbV_qdnfAQAA__--xBMu">