<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/140418>140418</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            x86 missing optimization for variable shift left (without avx512)
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          oscardssmith
      </td>
    </tr>
</table>

<pre>
    Given the following code
```
define <16 x i16> @mulbyconst(<16 x i16> %"a") #0 {
top:
  %0 = mul <16 x i16> %"a", <i16 8, i16 4, i16 8, i16 4, i16 8, i16 4, i16 8, i16 4, i16 8, i16 4, i16 8, i16 4, i16 8, i16 4, i16 8, i16 4>
  ret <16 x i16> %0
}
```
LLVM compiles this to a single `vpsllvw` instruction with AVX512, but in the absence of AVX512, it instead compiles to two `vpsllw` and a `vpblendw` (as shown in https://godbolt.org/z/PMehWerEd).

The issue is that although avx2 CPUs are missing the `vpsllvw` instruction (because avx2 is a bit of a mess), it includes the `vpmullw` instruction, so this could have compiled to a single `vpmullw` instruction by an alternating vector of `256` and `16`. This missed optimization is especially annoying because LLVM went through a bunch of work to canonicalize the variable multiplication by powers of 2 into a variable shift left, even though just leaving it as a multiply would have been more efficient.
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzEVE9z27gP_TTUBVMPRVn_Djq4Sfy7tDM99NfdK0VBFroU6REhKc6n36Fsp9k0e94Zj02TxHt4DwB1CHRyiI3IP4v8MdEzD35qfDB66kIYiYek9d2l-R8t6IAHhN5b61dyJzC-QyEPopC3jzx02JNDENlDWsAzUFqI7AnEXo6zbS_Gu8BCVe-PVS6U0kIpoWoQKpMgys9CHtifRXYQ8gDxjgSRPcI429_g38Q_xENKC6jiOi7298V_tJM9bQIm5A_yjp6J8vGdi1--_PgKxo9nshiABwrAHjQEcieLIAq5nIO1yyoKCeQCT7Nh8g5W4gEOP_7M082Kdmaga9V0G9AZBN-_OSfeolF3b9g88OpfOTYK7TrQ163Wouu2TaEqHSAMfnWRZGA-h1gtdRTqePJd6y3v_HQS6vgi1PHbVxz-wOmpE6reRb3y8H1AoBDm-A08aAZtefDzaQC9PCt4-Pb_AHpCGClE6ZuQfxcvVNWi0XPAazgF0NASR80aRgxBqPpVtrFzt5l7gxznm9g3kPFy8NcCGD_bDga94N2r7veifAQC7QW0i9JwcpqjjgUN-ynmJQqp8uLusShkGv_s4HukjLKxA39mGulFb2AUAMMZDWlrI67zl4h4F751zoqOgYfp6iS0szNDJFv99FfM2WjnHRlt6QU3AxY9kW4txuFiOlsy-p752a84hRitgNwm-PV2GKhnsNhzNAqvD8RG-nMO8UAvMTdi0LEUN_ALrL-sbBEdjH5CwL4nQ-h4l3RN1tVZrRNs0nJf5iovZZoMTVr0tURT1fuyS_Myr7BHbKtM5VWrCmkSapRUuczTUmX7SqW7LMeqqwuJqsSqzGqxlzhqsjtrlzE2Z7L1X5Pu5T6tEqtbtGF7C5VyuF67M74r-WMyNTHoUzufgthLS4HDLxgmttg8V8Vrr_6jar2fPrIttmwcWT9zbNltKutknmzzbpqIh7ndGT8KdYyct59P58n_RMNCHbdMg1DHm5SlUX8HAAD__1o81gE">