<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/139168>139168</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISCV] RISCVInstrInfo::insertIndirectBranch uses X27 without checking for RV32E/RV64E.
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          topperc
      </td>
    </tr>
</table>

<pre>
    RISCVInstrInfo::insertIndirectBranch hardcodes X27, but this isn't a valid register for RV32E/RV64E.
</pre>
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