<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/138513>138513</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            DAGCombiner/SimplifyDemandedBits making ISel DAG more poisonous for bitcasted vector
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            llvm:SelectionDAG
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            bjope
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          bjope
      </td>
    </tr>
</table>

<pre>
    Consider IR in this example:

```
define void @bar(i16 %a, ptr %p) {
entry:
 %.upto4 = insertelement <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 poison, i16 poison, i16 poison, i16 poison>, i16 %a, i64 4
  %.upto5 = insertelement <8 x i16> %.upto4, i16 5, i64 5
  %.upto6 = insertelement <8 x i16> %.upto5, i16 6, i64 6
  %.upto7 = insertelement <8 x i16> %.upto6, i16 7, i64 7
 %bitcast = bitcast <8 x i16> %.upto7 to i128
  %lshr = lshr i128 %bitcast, 48
  %trunc = trunc i128 %lshr to i32
  store i32 %trunc, ptr %p
  ret void
}
```
When running `llc -debug ...` on the above we see this:

```
Initial selection DAG: %bb.0 'bar:entry'
SelectionDAG has 33 nodes:
  t0: ch,glue = EntryToken
  t24: i128 = Constant<48>
  t28: i64 = Constant<0>
                    t11: v8i16 = BUILD_VECTOR Constant:i16<0>, Constant:i16<1>, Constant:i16<2>, Constant:i16<3>, poison:i16, poison:i16, poison:i16, poison:i16
                      t2: i32,ch = CopyFromReg t0, Register:i32 %0
                    t3: i16 = truncate t2
 t13: v8i16 = insert_vector_elt t11, t3, Constant:i64<4>
                t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>
 t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>
 t22: v8i16 = insert_vector_elt t19, Constant:i16<7>, Constant:i64<7>
 t23: i128 = bitcast t22
        t26: i128 = srl t23, Constant:i8<48>
      t27: i32 = truncate t26
      t5: i64,ch = CopyFromReg t0, Register:i64 %1
    t30: ch = store<(store (s32) into %ir.p)> t0, t27, t5, undef:i64
  t32: ch = X86ISD::RET_GLUE t30, TargetConstant:i32<0>

...

Combining: t27: i32 = truncate t26

Replacing.2 t22: v8i16 = insert_vector_elt t19, Constant:i16<7>, Constant:i64<7>

With: t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>


Combining: t27: i32 = truncate t26

Replacing.2 t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>

With: t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>


Combining: t27: i32 = truncate t26

Replacing.2 t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>

With: t13: v8i16 = insert_vector_elt t11, t3, Constant:i64<4>

...

Optimized lowered selection DAG: %bb.0 'bar:entry'
SelectionDAG has 18 nodes:
  t0: ch,glue = EntryToken
                t2: i32,ch = CopyFromReg t0, Register:i32 %0
              t3: i16 = truncate t2
            t35: v8i16 = BUILD_VECTOR undef:i16, undef:i16, undef:i16, Constant:i16<3>, t3, poison:i16, poison:i16, poison:i16
          t23: i128 = bitcast t35
 t26: i128 = srl t23, Constant:i8<48>
      t27: i32 = truncate t26
 t5: i64,ch = CopyFromReg t0, Register:i64 %1
    t30: ch = store<(store (s32) into %ir.p)> t0, t27, t5, undef:i64
  t32: ch = X86ISD::RET_GLUE t30, TargetConstant:i32<0>

...

```

The above looks wrong!
Before the DAG combine rewrites the bitcast is casting a vector without poisoned elements into an i128, but in the optimized selection DAG the bitcast is casting a vector with poisoned elements into i128 making the result poison. So the result of the bitcast is now posion.

I suspect TargetLowering::SimplifyDemandedBits/SimplifyDemandedVectorElts somehow is to blame for this.
When dealing with BITCAST in SimplifyDemandedBits it may call SimplifyDemandedVectorElts. We need to make sure that all smaller source elements mapping to a larger element are demanded when looking at a bitcast from 'small element' src vector to a 'large element' vector.
</pre>
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