<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/138513>138513</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
DAGCombiner/SimplifyDemandedBits making ISel DAG more poisonous for bitcasted vector
</td>
</tr>
<tr>
<th>Labels</th>
<td>
llvm:SelectionDAG
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
bjope
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
bjope
</td>
</tr>
</table>
<pre>
Consider IR in this example:
```
define void @bar(i16 %a, ptr %p) {
entry:
%.upto4 = insertelement <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 poison, i16 poison, i16 poison, i16 poison>, i16 %a, i64 4
%.upto5 = insertelement <8 x i16> %.upto4, i16 5, i64 5
%.upto6 = insertelement <8 x i16> %.upto5, i16 6, i64 6
%.upto7 = insertelement <8 x i16> %.upto6, i16 7, i64 7
%bitcast = bitcast <8 x i16> %.upto7 to i128
%lshr = lshr i128 %bitcast, 48
%trunc = trunc i128 %lshr to i32
store i32 %trunc, ptr %p
ret void
}
```
When running `llc -debug ...` on the above we see this:
```
Initial selection DAG: %bb.0 'bar:entry'
SelectionDAG has 33 nodes:
t0: ch,glue = EntryToken
t24: i128 = Constant<48>
t28: i64 = Constant<0>
t11: v8i16 = BUILD_VECTOR Constant:i16<0>, Constant:i16<1>, Constant:i16<2>, Constant:i16<3>, poison:i16, poison:i16, poison:i16, poison:i16
t2: i32,ch = CopyFromReg t0, Register:i32 %0
t3: i16 = truncate t2
t13: v8i16 = insert_vector_elt t11, t3, Constant:i64<4>
t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>
t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>
t22: v8i16 = insert_vector_elt t19, Constant:i16<7>, Constant:i64<7>
t23: i128 = bitcast t22
t26: i128 = srl t23, Constant:i8<48>
t27: i32 = truncate t26
t5: i64,ch = CopyFromReg t0, Register:i64 %1
t30: ch = store<(store (s32) into %ir.p)> t0, t27, t5, undef:i64
t32: ch = X86ISD::RET_GLUE t30, TargetConstant:i32<0>
...
Combining: t27: i32 = truncate t26
Replacing.2 t22: v8i16 = insert_vector_elt t19, Constant:i16<7>, Constant:i64<7>
With: t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>
Combining: t27: i32 = truncate t26
Replacing.2 t19: v8i16 = insert_vector_elt t16, Constant:i16<6>, Constant:i64<6>
With: t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>
Combining: t27: i32 = truncate t26
Replacing.2 t16: v8i16 = insert_vector_elt t13, Constant:i16<5>, Constant:i64<5>
With: t13: v8i16 = insert_vector_elt t11, t3, Constant:i64<4>
...
Optimized lowered selection DAG: %bb.0 'bar:entry'
SelectionDAG has 18 nodes:
t0: ch,glue = EntryToken
t2: i32,ch = CopyFromReg t0, Register:i32 %0
t3: i16 = truncate t2
t35: v8i16 = BUILD_VECTOR undef:i16, undef:i16, undef:i16, Constant:i16<3>, t3, poison:i16, poison:i16, poison:i16
t23: i128 = bitcast t35
t26: i128 = srl t23, Constant:i8<48>
t27: i32 = truncate t26
t5: i64,ch = CopyFromReg t0, Register:i64 %1
t30: ch = store<(store (s32) into %ir.p)> t0, t27, t5, undef:i64
t32: ch = X86ISD::RET_GLUE t30, TargetConstant:i32<0>
...
```
The above looks wrong!
Before the DAG combine rewrites the bitcast is casting a vector without poisoned elements into an i128, but in the optimized selection DAG the bitcast is casting a vector with poisoned elements into i128 making the result poison. So the result of the bitcast is now posion.
I suspect TargetLowering::SimplifyDemandedBits/SimplifyDemandedVectorElts somehow is to blame for this.
When dealing with BITCAST in SimplifyDemandedBits it may call SimplifyDemandedVectorElts. We need to make sure that all smaller source elements mapping to a larger element are demanded when looking at a bitcast from 'small element' src vector to a 'large element' vector.
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzkWE1v4zgS_TX0pdCGROrDPvjg2EkjQAMDJJmZvQW0VLY5oUSBpOLO_vpFUZI_EjtJb29OGwQQJRZfFR9fVUmWzqlNjThj6RXjfPWPaZBxztLlSLZ-a-wsPBqtTPkyW5jaqRIt3N6BqsFvlQP8KatGIxNzFoX_LOr_o3mJa1UjPBtVAkuilbSMT1ScAeOpZHwBjbc0bhifAsuvWDTH2tuXDoxmxm3jTQJMLEHVDq1HjRXWHphYTOAnqDhj4pruCDYiTBrEw4APAzEMGqOcqX_hTlwPD4aoVZZAQgHuI0w_jnDYywCWDkjpCVL2aaR0QMoGpOwEKf80UjYg5QNS3tO_Ur6Qzgekw_gcRg7egIr5ZIhBu60N68KAZo4AyU-yN_W2rYtg240G47CSYAUPps4bi3S3X3SiITKx6IPcSIj58pUc_95iDbata1VvgGWR1gV8K3HVbmA8HrMsAkOiRpAr84ywQ3CIQeVn1X1bK6-kBocaC69MDcv5dyY64lbjCBjPSfKiFzUnVu8H4-X8O2ylAyGgNiX2LgB8RBDFlvHFRrcYaLmm9Q_mCevOhCdk09EklkBp6WXtmVgkE9JrZzQJRlny2iYaTN7--TimRc9dkoolXP15-2P5-Nf14uGPuyOMeTj9Dokv3k7Elyb4pQnRTwxJFx7_6v35TREXgQpB1aDY9nw0LzfWVHe4Icr5Au5wo5xHOq9eYtEllkRHf3bQrPRIXqI5-FicUthl4OMzFt7YR9Q-sMwXBPOKiSyhIzx_PJ5o-gj3DWLgNj1DenCV9q58PP0YOzuLnV3CzgZszj_Gnp7Fzi9h53tscZIIQ4kinwcGPc9OrJzVYeUr5MlJ-nQL8143rw_6IDWf9ln2WWlRPvI07gG86NO9i4wKHBMLxiddraMBqXYKqvaGFio7pm5JpbfDpiDpEtpBW5e47mkKRUDwI_h_TbLb-yUVGjG_u354_P7jz-sQAV_Ag7Qb9Md80NKhVrBoThUyDBamWikqoYT8PkUsmt9ho2Wh6s2Yf6UUqLorvw0hfZ2Yf5uALw3tQMCXVYrfJ-ArQzsQ8L8pwceq_6PxqlL_xhK02aHF8jfbfjz55bb_RT3t3W52Ype-826wrzydft-_vdj9u_P4r3v-xX4g0q5dfE0j-P_rAcevwSyaP-zfmbUxTw521tQbxmmDV7imTdBbNUm_CKUDweLOKo8uTAzHpBzQld7OJXTJCjvlt6b1_ZljCf2njOvYkHX30cEXsGp991GKYPbJepKkn3J2yVNQTSWfaAHhWHStHuIaw705fmrWr33VZgeNccrUPYW34FrXYOF72n9QWelqKhPze1U1Wq1flljJusTySnnH-M3rx3-FuK-1d-BMhVuzI1_ewErLCmFtbPh8GQ8fPyVKTRsIG726fVjM7x-ItHPuQHmo5AsUUus3BgfHY_gboUYsyW0lnxBcGw5ceqCVrpJaowVnWlvggdRKNk3g0oAETRTYYRKkRSh7T7CjwElX4ag8yD2ta2sqqrbBxbCY8RycLYYjDfCM58HDsU03Px6VM1FOxVSOcBbnSZYkmZgmo-1MRFkc54lEnk2na5ms1lhEZTHJEh4nPC5GasYjnkZplMZxOk2TcY5TmU9EFhURL6LJlCURVlLpsdbP1djYzUg51-IsFpM0FiMtV6hd_7sLmdCxH7WJ_lcYO6O5b6t241gSaeW8OwB65TXOlvPvXUtGe0Yj4Sx74d7eow6ZUFFSdto1rQtC6VnFsqdm1Fo923rfhB7Fbxi_2Si_bVfjwlSM34SQu8u3xpp_sPCM34QtklT7XT7P-H8CAAD__55UY0g">