<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/138278>138278</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [HLSL][SPIRV] Add pass to rewrite CBuffer accesses
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            HLSL,
            backend:SPIR-V
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            s-perron
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          s-perron
      </td>
    </tr>
</table>

<pre>
    A new pass will be added to the SPIR-V backend to implement [Lowering to buffer load intrinsics](https://github.com/llvm/wg-hlsl/blob/main/proposals/0016-constant-buffers.md#lowering-to-buffer-load-intrinsics). This pass has been implemented for DXIL, but we want a different codegen for SPIR-V.


- [ ] Update the [SPIR-V design doc](https://github.com/llvm/wg-hlsl/blob/main/proposals/0018-spirv-resource-representation.md) to mention the pass and how it will work.
- [ ] Update the [CBuffer design doc](https://github.com/llvm/wg-hlsl/blob/main/proposals/0016-constant-buffers.md#lowering-to-buffer-load-intrinsics) to mention that SPIR-V will have its own implementation.
- [ ] Implement the pass in the backend.
</pre>
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