<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/137575>137575</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AVX-512] Propagating lowest bit to all bits in u64 lane should use `sra(sll(x, 63), 63)` instead of `neg(and(x, 1))`
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
Validark
</td>
</tr>
</table>
<pre>
[Zig Godbolt](https://zig.godbo.lt/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:13,fontUsePx:'0',j:1,lang:zig,selection:(endColumn:1,endLineNumber:13,positionColumn:1,positionLineNumber:13,selectionStartColumn:1,selectionStartLineNumber:13,startColumn:1,startLineNumber:13),source:'export+fn+foo(vec:+@Vector(8,+u64))+@Vector(8,+u64)+%7B%0A++++return+-%25((vec+%3C%3C+@splat(63))+%3E%3E+@splat(63))%3B%0A%7D%0A%0Aexport+fn+bar(vec:+@Vector(8,+u64))+@Vector(8,+u64)+%7B%0A++++return+asm+(%0A++++++++%5C%5C+vpsllq+$63,+%25%5Bvec%5D,+%25%5Bresult%5D%0A++++++++%5C%5C+vpsraq+$63,+%25%5Bresult%5D,+%25%5Bresult%5D%0A++++++++:+%5Bresult%5D+%22%3Dx%22+(-%3E+@Vector(8,+u64)),%0A++++++++:+%5Bvec%5D+%22x%22+(vec),%0A++++)%3B%0A%7D%0A'),l:'5',n:'0',o:'Zig+source+%231',t:'0')),k:51.313288405045796,l:'4',n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:ztrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:13,fontUsePx:'0',j:3,lang:zig,libs:!(),options:'-O+ReleaseFast+-target+x86_64-linux+-mcpu%3Dznver5',overrides:!(),selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+zig+trunk+(Editor+%231)',t:'0')),header:(),k:48.68671159495422,l:'4',m:100,n:'0',o:'',s:0,t:'0')),l:'2',n:'0',o:'',t:'0')),version:4) [LLVM Godbolt](https://llvm.godbolt.org/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:14,fontUsePx:'0',j:1,lang:llvm,selection:(endColumn:1,endLineNumber:13,positionColumn:1,positionLineNumber:13,selectionStartColumn:1,selectionStartLineNumber:13,startColumn:1,startLineNumber:13),source:'define+dso_local+range(i64+-1,+1)+%3C8+x+i64%3E+@foo(%3C8+x+i64%3E+%250)+local_unnamed_addr+%7B%0AEntry:%0A++%251+%3D+and+%3C8+x+i64%3E+%250,+splat+(i64+1)%0A++%252+%3D+sub+nsw+%3C8+x+i64%3E+zeroinitializer,+%251%0A++ret+%3C8+x+i64%3E+%252%0A%7D%0A%0Adefine+dso_local+%3C8+x+i64%3E+@bar(%3C8+x+i64%3E+%250)+local_unnamed_addr+%7B%0AEntry:%0A++%251+%3D+tail+call+%3C8+x+i64%3E+asm+%22+vpsllq+$$63,+$%7B1%7D,+$%7B0%7D%5C0A+vpsraq+$$63,+$%7B0%7D,+$%7B0%7D%22,+%22%3Dx,x,~%7Bdirflag%7D,~%7Bfpsr%7D,~%7Bflags%7D%22(%3C8+x+i64%3E+%250)+%232%0A++ret+%3C8+x+i64%3E+%251%0A%7D%0A'),l:'5',n:'0',o:'LLVM+IR+source+%231',t:'0')),k:49.178082191780824,l:'4',n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:irclangtrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:14,fontUsePx:'0',j:1,lang:llvm,libs:!(),options:'-O3+-march%3Dznver5',overrides:!(),selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+clang+(trunk)+(Editor+%231)',t:'0')),k:50.82191780821918,l:'4',m:100,n:'0',o:'',s:0,t:'0')),l:'2',n:'0',o:'',t:'0')),version:4)
```zig
export fn foo(vec: @Vector(8, u64)) @Vector(8, u64) {
return -%((vec << @splat(63)) >> @splat(63));
}
```
Gives:
```asm
.LCPI0_0:
.quad 1
foo:
vpandq zmm0, zmm0, qword ptr [rip + .LCPI0_0]{1to8}
vpxor xmm1, xmm1, xmm1
vpsubq zmm0, zmm1, zmm0
ret
```
Should be:
```asm
foo:
vpsllq zmm0, zmm0, 63
vpsraq zmm0, zmm0, 63
ret
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsWF9v4zgO_zTKi9BAlv_mIQ-x2y4WmLsZ7OCKw74Usq242pGljCSnmT7cZz9QctI4TTPtLDB3WGyR-g9JkSIlkj-LWSs6xfkSpSVKr2dscA_aLO-YFC0zX2a1br8B73fR4V90W2vpUHqNaPHg3MaieIXoLaK3T6Kbd8CeS-cpced5EaIFosXrLw8oXjW65TetcNogWgnPLdZCcsV67t_yCNEc0WqtlfvcMAnUKB4J_7L80y6IkSD2B7ARrSRTYOtJdIhWlkveOKFV0M9VW2k59GqU5ar9IBT_59DX3OzVb7QVMGQiuSe-FD-Y-OyYcZNBU9aZoS9HnBVcAEcPphkDw3cbbRyi5VrBRWtEiy1vPLNECbnjjQ9rUSBaIVoOWeKVLC6zS0TTHC7E69n_DHeDAUNXiKY0DSsI5vyAuBovoNluJHOIFln8bI-m8c14OS-SxnubaX69fyKrqZM1Mz_HSWZ7TyleiEx_aVqNl3K7sVJ-9dQE3KqCAIQqTUsfqRSyZ0o33A6QNp71DlOGvWpqovIHrYXwvhjiVVFYrOvd-AhBujpa2QsLUr3V5nOwgsFjW573irJXtlEeBsiQNmkoFGpSNnR4-x3KRTkmWTAej_XHHcuP_nxB8SqN5nEU06JISEqSNF9kz6aSC6bCC1RRckZ7db5W9hsh-VGlPFDi1ZMzg_oCdVFIx00oz0U9MV0Lxcy3SVkNpI_1H7xxE0aj-54r91HJbxMdLa-HrmJS2ol4y3umOsmnssJA5dtyOyHzHW8GNy3vQjkuJ1JS1IaZb5Vup0qdEf1k6JabWlt-HWYgVHcay7Vknb0T_PHjhqsfbSrxaVORorZHKwSG9AbK_Ojs1UdEy9-45MzyW2ahhl05ZjoOT7siu8-SKynUsANG32wGn1ZPasvNuEX1lhsjWn5q5r3t7H3d7Meb2Vt72Ukri96cnoiWPvbluNehHuzBwyFZF6_n6wNnrZ_CIZSQwUkxz4osj6J0kSzSBArNSQLDfosI-bFUPvKNfrcenBu85caGxYZKilFafvhw949LiEzKbR8gmXRzbbqfhMqSt6IymN9fFpa1fC0UdI_W6nupGyYBWDDVcUQLAd2wvIpCb4yewVFVQFVAtPQSh24aUN2rAtDYSVDiLd0PCpaovWdtayYo50a5sfIfdc2UptFoH3otU-2l2YzGYOIjfCsPHgVPpqrpkWo71IiWyj5eMPDEjRZKOMGkePJd7miSB9WGu-9Nkp4DkmeX5ULkA9T8SZF3TMB0GiYvzWoPSgMWOsabExyYeNvR6P8xjexjklZ-Ksc48owKckmFL5OniLCC__94wVYY6Lt7FYG43lhzQoHefKzzTSH3tZ6-b1dEfwIXQsFFtPz1t_eiw2Qxj_KCFDRahHvyv0GHwjRQe__GiH8SI763xX0fJMYe_jHTPPyN_96A__w2Dp1n3MyL9-NA_91G5s9ZGS2i4v8a9SGyQhkJP4DA-4MRvFb4-OQHn36B48P392ssjPISkRXGGIfjDwyf84fzHYziCsUVPnNog1F8g-KbcywUg06UXx9PHJ7J6pd9rvu3AxOaG1nNP1SffiX3JPDx_OvAWoxxhMgK3AzU8W-7Yar9ivFT38MKHO5fH7Vp8cYZgMpGbDCiJT4oTq9RXkZOF2Fyz8p22mCMd30Pu3Z6PxazQz21GR1sP4tBO3rh-OcHPcgW1_w15894CC3-hYNZPJUx7EwUJkIn85m1y7hdxAs248soT9IiimmazR6WbRQVLVnzPM4KTsl6Dc9Zk5MmWcRRns3EkhKakoQWJCF5nM0ZWy8ammQJX6_bmhGUEN4zIef-G0SbbiasHfgyivM0T2eS1Vxaf-BMqeKP2HMRpSi9npklDLqqh86ihEhhnX1W44ST_qR6dffvqzSCAfiT0RvWMSdUh6V-5NbhWjjsNGZSwqPFQsE2x5Ipjm1YgMFyjDJiDUO0sIC4it0YMZ9540NGsFDWcdZivYYBineIFh4khwHRuNczMhuMXE6_wTrhHoZ63uh-_CAbb1cbo30jpbfed4vo7Ric7ZL-NwAA__9hq03h">