<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/137274>137274</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            AArch64 backend incorrectly lowers `mul` into `umull`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          vector542
      </td>
    </tr>
</table>

<pre>
    The AArch64 backend incorrectly lowers `mul` into `umull` when a smaller than full-width pre/post index load precedes the instruction. Here is a minimum reproducible example that can be compiled with Clang:
```cpp
#include <cstdint>

uint64_t test(uint64_t *ptr) {
 uint64_t a = *ptr + 8;
    uint64_t b = *(uint32_t *)a;
    return a * b;
}
```

It outputs this assembly:
```asm
ldr     x8, [x0]
ldr w9, [x8, #8]!
umull   x0, w8, w9
ret
```
This is incorrect as `umull` performs a 32-bit input to 64-bit output multiplication. The instruction should be `mul` for 64-bit inputs. [For reference, GCC and MSVC correctly compile it.](https://godbolt.org/z/jKnovWjr7)

The backend appears to think that the upper 32 bits of `x8` are zero, which triggers this rewrite:
```
def : Pat<(i64 (mul top32Zero:$Rn, top32Zero:$Rm)),
 (UMADDLrrr (EXTRACT_SUBREG $Rn, sub_32), (EXTRACT_SUBREG $Rm, sub_32), XZR)>;
```

</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJykVMFu2zgQ_ZrxZRBDJiVbOuig2HF3sVtgkaa7RS8BJY0tphQpkMM46dcvKDtJm8WeChCwOW_4NG_mkSoEfbRENRTXUOwWKvLgfP1IHTtf5GLRuv65vhsIm8Z3wzrHVnXfyPaobee8p47NMxp3Ih8Q1tkYDawz1JZd2sYxmjlwGsiiwjAqY8gjD8riIRpzddI9Dzh5ArGfXGDUtqcnNE71KdpRTwF5INQ2sI8da2eX-Bt5Qh1Q4aitHuOInibv-tjp1hDSkxonQ-kzjJ2y2BJ2bpy0oR5PmgfcGmWPIBvIGlhn59VNU9oKqW1nYk8IctsF7rVlkDcJypqoLa_ze0amwCDK1z2IZmIPokLYXEPW4CuiEOTugiOIayxBzhmIb0ntS9KFU4ozJ4hKvaV74uhTH0E02J7jsNn9KOJc5u-MLvIUOfUu9SkEGlvz_E6xCiNkjel9IsenEsQWobh-yqDYXYBT9RI8o0KWCRSr1Iw03XQwS9BpTjhVkDWe-F1Nd6mKtF5cgyr8ZJCJ_MH5MY1UiqtWJyNMkZEdrvN5fxaEYzSsJ6M7dbbC3c_ewDC4aPo08Tc7Hpx_YZlZwzIp2juPng7kyXaUav-w3aKyPX789PcW39x9cQ5qXs7Sy4F5CqmVYg9if3R96wwvnT-C2H8HsX_4w7rHfx78BkR1nkcq8uXiqGki5UNSxoO2384uTRaP00QepcBWc0B3SAqeyiRAecLv5N3c4UF3A7LXx2O6dPN8PZ28Zno3Xsiang4IssG_FIPcgij1OkcQ5RgNspuk-JpYk5T81ib298ExaUhrmzwIovz8sdnt_vQ-ebm8-XJ322zv7j99vr69-YCvLCG291Kcz_1P3vifvC9fb9M_eXMx9g8yFn0t-0pWakH1apMXhayqqlwMdZmvD5uyE91K9ZSti1JuVNspKVUmq9VqtdC1yESR5aLIspVclcsiq0ReFW3eq6zNVQF5RqPSZmnM45iGuNAhRKpXciM2-cKolkyYn0chLJ1wRkGI9Fr6Oh26auMxQJ4ZHTi80bBmQ_UvPZuL6E39zm2ah9guOzeC2KdvXX6uJu8eqGMQ-7nCAGJ_kfBYi38DAAD__xa5zWo">