<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/136209>136209</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[X86] Target feature implication mismatch with GCC
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
sayantn
</td>
</tr>
</table>
<pre>
There is a mismatch between which other features `avx512f` and `avx512fp16` imply.
For `avx512f`, GCC implies only `avx2`, where LLVM also implies `fma` and `f16c`(see [here](https://github.com/llvm/llvm-project/blob/1756fcb8b0192281db641d2038c03b96015e29d4/llvm/lib/Target/X86/X86.td#L118)).
Also for `avx512fp16`, GCC implies only `avx512bw`, where LLVM also implies `avx512dq` and `avx512vl` (see [here](https://github.com/llvm/llvm-project/blob/1756fcb8b0192281db641d2038c03b96015e29d4/llvm/lib/Target/X86/X86.td#L174)).
`gcc -mavx512f -Q --help=target | grep enabled`
```
-m128bit-long-double [enabled]
-m64 [enabled]
-m80387 [enabled]
-malign-stringops [enabled]
-mavx [enabled]
-mavx2 [enabled]
-mavx512f [enabled]
-mcrc32 [enabled]
-mdirect-extern-access [enabled]
-mevex512 [enabled]
-mfancy-math-387 [enabled]
-mfp-ret-in-387 [enabled]
-mfxsr [enabled]
-mglibc [enabled]
-mhard-float [enabled]
-mieee-fp [enabled]
-mlong-double-80 [enabled]
-mmmx [enabled]
-mmwait [enabled]
-mpartial-vector-fp-math [enabled]
-mpopcnt [enabled]
-mpush-args [enabled]
-mred-zone [enabled]
-msse [enabled]
-msse2 [enabled]
-msse3 [enabled]
-msse4 [enabled]
-msse4.1 [enabled]
-msse4.2 [enabled]
-mssse3 [enabled]
-mstv [enabled]
-mtls-direct-seg-refs [enabled]
-mxsave [enabled]
```
`gcc -mavx512fp16 -Q --help=target | grep enabled`
```
-m128bit-long-double [enabled]
-m64 [enabled]
-m80387 [enabled]
-malign-stringops [enabled]
-mavx [enabled]
-mavx2 [enabled]
-mavx512bw [enabled]
-mavx512f [enabled]
-mavx512fp16 [enabled]
-mcrc32 [enabled]
-mdirect-extern-access [enabled]
-mevex512 [enabled]
-mfancy-math-387 [enabled]
-mfp-ret-in-387 [enabled]
-mfxsr [enabled]
-mglibc [enabled]
-mhard-float [enabled]
-mieee-fp [enabled]
-mlong-double-80 [enabled]
-mmmx [enabled]
-mmwait [enabled]
-mpartial-vector-fp-math [enabled]
-mpopcnt [enabled]
-mpush-args [enabled]
-mred-zone [enabled]
-msse [enabled]
-msse2 [enabled]
-msse3 [enabled]
-msse4 [enabled]
-msse4.1 [enabled]
-msse4.2 [enabled]
-mssse3 [enabled]
-mstv [enabled]
-mtls-direct-seg-refs [enabled]
-mxsave [enabled]
```
`gcc --version`
```
gcc (GCC) 14.2.1 20250207
Copyright (C) 2024 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
```
I do not know what Intel specifies about implies features, but I believe this mismatch needs to be corrected.
related: rust-lang/rust#138940
related: rust-lang/rust#111137
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzMWFtv4zYT_TX0C0GDpC62HvzgOOv9DGQvX-It2keKGklsJVIlaTvury-oOJfdyPE6RYINhCTgzJkZHlIzOBLOqUoDzFBygZLLkdj42tiZE3uhvR7lptjP1jVYwMphgVvlWuFljXPwOwCNd7WSNTa-BotLEH5jwWGUUrG9TRgvUUqx0MWTlY6lYVG1XbMfIzpHdL409nsI4gv8cbHonRQ4bHSzP3jwg3nX13R19dsnLBpnHlxRSstWPElbslT2mKkDwCi5CECUXCI-rb3vHIrmiC8RX1bK15t8LE2L-LJptvd_SGfNnyA94su8MTniSzZJ0lLm05yyjPMpK_I0ZgWn0VTSKM9SyhLgWRE_iaMCbi1sBSHO79P07vfYF4hHV4xNEc8QzwIh87Cd8jtK7jh7gZWE8Xx3mpk7z-LvZ6eybcLSr83RJH7kKDwpraTEpD1whMn_MSE1NB2KLn0fBaPJAlcWOgxa5A0UgaEeeXjoHGPSMj7NlSeN0RUpzCZvegruIcnlwS2N8cmfZzjSTmk0nZwLC9tqVKWJ81bpynRu2Gd7-5qSwmt0NuwJ00M2aWV0KuhAKYWyID2BWw9WEyElOPczpcAWQi2DtlJouSet8DU5Sv1AKWVHLHii9HHUcLpbZwcNVaNyeT4ltbAFKRsj_BkwTFoFAKTsBm1P7jaZ0p8upW1fcb8CbieUH7R0wnolGrIF6Y0lZdef08lCOtNJ_QIfxwrpNq4mwlbDr4-FgvxjNJwVlbTOvYg4WoxzMHxhnYPo7IA97GRLOpIuHrPjphOv8WAlp3cwmM5vB9d948ihMzioiIXyWVMYKuPWie2po_kR9nQY_DhSOpb-mlPlYay86-C4nxzHR0O-e3FuvCLb_TEcHzlDlneYKoMubzNBhizvMCQGG_t7DYRB17cdAkf64av2-3KrP9Z5X5npRDMfNr19wx7y-88d-rFJky1Yp4x-3n2DGfHpx8UC8QyzeMzHDHPKE8rpBNH5wnR7q6raB6_eh1Me46UFwDem9DthAS_NRhfChwR8gVdaBtmxrpULOrgMru7giqILHGSTr8Paxkro1Zs03V7pCkujCxXiuDHGD0r68xdE5zthrdB-HyJo4zFsQffYTx-uF_-bf17PL1ZXq_Uf2Fi8XK0_f7i5wcsv13iOv86v16vFt6v5Nf767frrl5sP4-dMrXBh-rh_abPDu1p4vNIeGuw6kKoMmlDkZuMfFOK9fg87zjcer3AOjYJt2Jtyj9pfAxQOe4NzwNLYcOxQHGSZhUZ4KFA0x3bjPGmErhBfhv8Rj1g0zWJ62o0xFk1GxSwqsigTI5ixSRxnPGUJH9UznkjKJ5RGWRyXkEguRZ5mEaSslDKnyUjN-uOO2YSzmEd8DEXKxERQkHGWJnGJYgqtUM04aM-xsdVIObeBGYtSTrNRI3JoXP9JhHMNO9xbEecouRzZWa94803lUEwb5bx7DOOVb_pvKUG-Jpf4Ts7eM3vHtOyv1SOdO-XrIOxHG9vMztbbfWkuKO672rcz_m8AAAD__3sL4gU">