<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/135617>135617</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Failure to use `CBB` and `CBH` with `FEAT_CMPBR`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Kmeakin
      </td>
    </tr>
</table>

<pre>
    `FEAT_CMPBR` from armv9.5a adds [CBB](https://armv8.arm.com/latest_builds/v9A/isa64/cbbcc_regs.xml), [CBH](https://armv8.arm.com/latest_builds/v9A/isa64/cbhcc_regs.xml) and [CB](https://armv8.arm.com/latest_builds/v9A/isa64/cbcc_regs.xml) instructions. LLVM is able to generate `CB` instructions for comparisons between 32-bit and 64-bit types, but it does not generate `CBB` or `CBH` for comparisons between 8-bit or 16-bit types; instead it zero/sign extends to 32-bits and uses `CB`:

https://godbolt.org/z/xW71dqv4h
```c
u8_w0_eq_w1:
        and w8, w1, #0xff
        and     w9, w0, #0xff
        cbne    w9, w8, .LBB0_2
        b       taken
.LBB0_2:
        b       not_taken

/*
 *
 * u8_w0_eq_w1:
 *      and     w8, w1, #0xff
 *      and     w9, w0, #0xff
 *      cbne    w9, w8, .LBB0_2
 *      b       taken
 * .LBB0_2:
 *       b       not_taken
 */
```


</pre>
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