<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/131980>131980</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[WASM] Implement movemask routine
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
Validark
</td>
</tr>
</table>
<pre>
Currently LLVM does not recognize movemasks. [Godbolt link](https://zig.godbo.lt/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:14,fontUsePx:'0',j:1,lang:zig,selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:'export+fn+z(x:+@Vector(64,+u8))+u64+%7B%0A++++return+@bitCast(x+%3D%3D+@as(@Vector(64,+u8),+@splat(!'+!')))%3B%0A%7D%0A'),l:'5',n:'0',o:'Zig+source+%231',t:'0')),k:50,l:'4',n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:ztrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:14,fontUsePx:'0',j:2,lang:zig,libs:!(),options:'-O+ReleaseFast+-target+wasm64-linux',overrides:!(),selection:(endColumn:1,endLineNumber:1,positionColumn:1,positionLineNumber:1,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+zig+trunk+(Editor+%231)',t:'0')),header:(),k:50,l:'4',m:100,n:'0',o:'',s:0,t:'0')),l:'2',n:'0',o:'',t:'0')),version:4)
```zig
export fn z(x: @Vector(64, u8)) u64 {
return @bitCast(x == @as(@Vector(64, u8), @splat(' ')));
}
```
LLVM IR:
```llvm
define dso_local i64 @z(<64 x i8> %0) local_unnamed_addr {
Entry:
%1 = icmp eq <64 x i8> %0, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%2 = bitcast <64 x i1> %1 to i64
ret i64 %2
}
```
Emit:
```asm
z:
local.get 0
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 1
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 3
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 2
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
local.get 4
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 5
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 7
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 6
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 4
i32.shl
i32.or
local.get 12
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 13
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 15
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 14
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 12
i32.shl
local.get 8
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 9
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 11
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 10
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 8
i32.shl
i32.or
i32.or
i32.const 65535
i32.and
local.get 16
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 17
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 19
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 18
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
local.get 20
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 21
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 23
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 22
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 4
i32.shl
i32.or
local.get 28
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 29
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 31
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 30
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 12
i32.shl
local.get 24
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 25
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 27
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 26
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 8
i32.shl
i32.or
i32.or
i32.const 16
i32.shl
i32.or
i64.extend_i32_u
local.get 32
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 33
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 35
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 34
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
local.get 36
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 37
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 39
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 38
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 4
i32.shl
i32.or
local.get 44
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 45
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 47
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 46
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 12
i32.shl
local.get 40
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 41
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 43
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 42
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 8
i32.shl
i32.or
i32.or
i32.const 65535
i32.and
local.get 48
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 49
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 51
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 50
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
local.get 52
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 53
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 55
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 54
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 4
i32.shl
i32.or
local.get 60
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 61
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 63
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 62
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 12
i32.shl
local.get 56
i32.const 255
i32.and
i32.const 32
i32.eq
local.get 57
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 1
i32.shl
i32.or
local.get 59
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 3
i32.shl
local.get 58
i32.const 255
i32.and
i32.const 32
i32.eq
i32.const 2
i32.shl
i32.or
i32.or
i32.const 8
i32.shl
i32.or
i32.or
i32.const 16
i32.shl
i32.or
i64.extend_i32_u
i64.const 32
i64.shl
i64.or
end_function
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJzsW19vozoW_zTOi9UIbEPIQx4S0q6uNHe7uqPtSvtSEXBS3xqTsU2m7ae_MpA2_GtJ2pBkNAi1YB8fHx__zo9jBwKl2EpQOgHODDjzQZDqh0RO7gLOokA-DhZJ9DzxUymp0PwZfvt29yeMEqqgSDSUNExWgr1QGCcbGgfqUQ0hcGb_SqJFwjXkTDwCZw6Q96D1WgE8BegGoJsXthqujMyQ66wEr7I6GyAPIK_95gHgaZhE9DpiOpEA-Syr9ZaMUxHENLsb2QCNAPKXidDfw4CbUpsUBf9V9D9PuZiVi_1tqgHyeSBMXy9sBZCvKKehZonI9VMR-QlPY1HIUhF9Y4L-O40XVBZl60Qx06IkuC2sSb928F0HUpfalKvqLesNmuTGpiJJZVg4hT6tE6kBmi0FQLMXgLzcDTNArDsaZu70XOMmgGaplykYm0tTNgPIGZk_VtZie0qqUylyHQum_UDpTG8mj-fFH1MbKDOB7T35uZha80BnU53P4Wx7Md6eDt6a4YzmxVVe7_N8oE4-raI0yUl-938zubPCLZmVCBdo0bvyeV_-I8BTx3pTTd5Rnd8YjFsN2vxmJMdrxukOjl9L8PRFy1Q8GtQyrqnMg8dblLpeMBHI5xLo86Lbxd801KWKMIljKvSt4M8lHRFdpCs_4FyVxCMaB2LFaVmWSYPMDVWlYvpEw1SXg48JTXlJirOFDOSzn0RlpVqyuNR0Q-UiUXSeW8DEqurLJQ9W6o7Rn7drKg4NeVQNec4WameGTEfJ2oRhMdirW4Bmf1FOA0VvMqTPrnQgV9Rc_QxU7JIrzkT6VMBiQ6VkEa3q_MWYxe4ce4Z1svArgD0DyNvy-GskjtuD8YEGUWbCqytbwtOgybaswwJ1ZzDow2hvaryhUuWzS0yBNTWna-WncYA1zakYLgXc0jCsUSPcUjBMXQLBaAasKYQQ5pQLy4QLAZ4DPIetRLvV5sMSyY5giVyx6QSM5rsW5wPIHvt__GWGWx4Q55sYWNOILpmgMFLJPU_CgENmjCaWGR_AvkvgE2QewNfQULYZVSZ2nwrz1I7ugyiSxSCvhc4pzYwXIMc2g4MsjNeQ_oBNynxTyjyITUjD3xe_L_a9wNdbtKEMbQumw0DpN7TZBdpsqBOD7UxcUp3jHDmoLXCuY6brURMoEzQvW5TnRxYRwxXV0NopZRgNw0QoXdwjx6nUBiKCjQ0wqhTTHxA2dpgfdqOWPTrMj9Zuq4LV_tQDr-pNZIvFuB8X1cbWYnLVlVW13czr7Mk2zVslH3vyXefmB2ky6UA0dEBfVW9Dr58BX03-M-jLj9FxHdQVezXr3NPERlV8a1839FW1ke7aajzWIfq-AEpv3donYqM2CHfxUd_h1hm9hX3V-T_2w6gNvTtF74C4NjMfqKsO1-uXa8cXx7W2faZka_eUrB2Xbb0v1eY6Dv5g4LX5PeyhdThnF932_AzfIxBqpnYI2i_wUGMgdCHsKoSOzSmfI-zaKNCJFl3oklZd6NyXXZe47mrMfA97SqLmIPw6MNU6PA0p2Ye7CPcdb3smvtjq94m0B412wG73vBc1J_h7D3dvvm1e-Jwp347OnG_7ydqOy7fel2rLE9mO6lwypE-aiuieYXSfNrm45pt-EmOM-6WhTyTGtaXGeSXGuAPRnXNijHvaTqz5rZn7zpOo8WF50N5OOpSocYfVWYN950XUn0iMybG3E2sdnoaUPpEYk77jbc_EmLj9PpFOlRiTE21EkEvaiCBnvhFBfoWNiK9KjA_YDiZ9b2SQi9vIcM58I8O5qI2MmvV9_4bsXN5vyDWjjr2y2ReBl_0bctsbEO3adl4BOVES4V5SEuGeeRLh_gpJhN2mrhatHfYZvpZxT7S5-hnG7fvFjX0Z99hp23EZt-0tiMO01V5peC8jadgJ3oq55B3fuOQNPy6pmmf0LVORf26y8_7xIJrgaIzHwYBO7BFB2B3ZyBs8TALbG40cEnlLQkJCwjGiljteEte2QyukaMAmyEKOhe2x5TrI8oY4IsQd29TGY8sNPAqIReOA8SHnm3iYyNWAKZXSiY3tsWcNeLCgXGUfGyIk6E-Y1QKEgDMfyIlpdLVIVwoQizOl1ZsazTTPvlL83_T7n8CZwz_iNacxFfr140Mok1QzQQep5JPyF4crph_SxTBMYoBuso8W8n9Xa5lkn0qhm8wSBdBNYepmgv4JAAD__8NuxnI">