<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/130119>130119</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU] Assertion "This is not a register operand!" failed in SIFixSGPRCopies
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          jayfoad
      </td>
    </tr>
</table>

<pre>
    With this [test case](https://github.com/user-attachments/files/19111170/r1.txt) I get:
```
$ ~/llvm-release/bin/llc -mtriple=amdgcn -mcpu=gfx1100 r1.txt
llc: include/llvm/CodeGen/MachineOperand.h:366: Register llvm::MachineOperand::getReg() const: Assertion `isReg() && "This is not a register operand!"' failed.
```
`llc` built from git revision 78281fd12c9f5c46b95d9399ae72ca357812ecee.
</pre>
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