<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/129955>129955</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
s390x: `llvm.fshl.i128` is not optimized well
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
folkertdev
</td>
</tr>
</table>
<pre>
The [llvm.fshl](https://llvm.org/docs/LangRef.html#llvm-fshl-intrinsic) intrinsic is neat. Sadly, the s390x backend does not pick good instructions for it.
https://godbolt.org/z/j6Kcob8oa
e.g. this LLVM IR
```llvm
define noundef <16 x i8> @vec_sld_manual(<16 x i8> %a, <16 x i8> %b) unnamed_addr {
start:
%0 = bitcast <16 x i8> %a to i128
%1 = bitcast <16 x i8> %b to i128
%_3 = tail call noundef i128 @llvm.fshl.i128(i128 noundef %0, i128 noundef %1, i128 noundef 32) #4
%2 = bitcast i128 %_3 to <16 x i8>
ret <16 x i8> %2
}
define <16 x i8> @vec_sld_builtin(<16 x i8> %a, <16 x i8> %b) unnamed_addr {
start:
%_0 = tail call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 noundef 4) #4
ret <16 x i8> %_0
}
declare i128 @llvm.fshl.i128(i128, i128, i128) unnamed_addr #2
declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32 immarg) unnamed_addr #3
```
A `llvm.fshl.i128` with a compile-time known value that is a multiple of 8 can be lowered to a `vsldb`, but that does not happen
```asm
vec_sld_manual:
vrepib %v0, 96
vsrlb %v0, %v26, %v0
vrepib %v1, 32
vslb %v1, %v24, %v1
vo %v24, %v1, %v0
br %r14
vec_sld_builtin:
vsldb %v24, %v24, %v26, 4
br %r14
```
analogous simplifications are possible for `vec_sldw` and `vec_sldb`
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJysVctu47gS_Rp6U4hAUZJjL7RwkmvgYjKbnsFsDT5KFjsUKYiU3d1fPyBlO7acBGhgAgNiWMVTderJvdd7i1iT6olULws-htYNdePMGw5B4WEhnPpZ_90ikOrJmEOXNb41pHohbNWG0HtSbAjbErZNQjfsCdsqJz1h21du99-wydrQGcKKqPAQXz9oGwZtvZaEreHyD2gPFnnI4C-uzE_CniG0CL5Y0x8guHxDq0A59GBdgF7LN9g7p0BbH4ZRBu2sh8YNoEMGhG4I3dx6uHdKOBNOTv4ibPt9-Yd0YuX4pI7ZPoPQag-vr__8Cf__Nl3H35JOv0iC0I3CRlsE60arsAFSPOdL-AF6RYr_ASnpAeXOG7XruB25IWw102AVj_zubkWMyGgt71DtuFIDkMcnQjc-8CFEInQDUY8CKV5A6CC5D_cwHIIDnbPVWT__Wl_M9XdFehC4NiC5MRemUSkSvJRClp6xVRJc4sEqGvnNL_O7y4JFxoQV5dk0u3F1spccCu7W8fRgwA_osJixx5cpdadUfZoiMWoTtP3vc7SjsxjeuZCCGOs7O3ijxG-58Ay6YJcwljdR_DAoO3obFWn4gF_n85yt9--cOCvYLd7vcryjd2amu47HPr23WFz342R9A6fWvKKwpHDUoQUO0nW9NvgQdIfwZt3RwoGbESG0PMSpw6EbTdC9QXANrEByCwLBuCMOqGLh8WhgIrBMlS3GMD2_DKSW9z1amM0L7uO4mI2DU41Mf4cBey1SxRwS9Hp5LfWDEXAljQe2PJ_oJ0Cp0VJu3oESzrs0AZXnUx5VD27SnYs-MCaGi-qQlxPpeUdNNFPU7kCvTolM-SX2bba55cbt3ejB6643utGST9M_VmDvvNfCYFoFMWuTV8dYENyqqysxIS5UXah1seYLrPPHMmd5ta5Wi7bOaZHL5nGd05yXFBll67xShSpRUE45W-iaUVbRglasoFX1mCm64kwqWSouWSNzUlLsuDbZeTkutPcj1jlbr6tqYbhA49PuZcziEZKUMBZX8VCnhSnGvY9tpH3w7zBBB4N1Wo2k-KT69VSXrg-6079QwRGNWYyDqWdrUYd2FJl03WmLnz4P_eC-owyEbZNfcaWfHD_U7N8AAAD__z9_Vsg">