<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/129757>129757</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [DirectX] Re-evaluate pass ordering for producing correct DXIL module flags
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Icohedron
      </td>
    </tr>
</table>

<pre>
    According to #120119, the DXIL Shader Flags pass needs to be executed before the DXIL Op Lowering pass in order to simplify its implementation by being able to work directly with DirectX target intrinsics. However, this dependency creates a challenge, as the shader flag analysis is based on instructions that may not exist after the lowering pass.

This issue was discovered with the implementation of the Int64Ops Shader Flags Analysis and the resulting DXIL failing validation by `dxv` due to mismatched flags (https://github.com/llvm/llvm-project/pull/129089#issuecomment-2695570866). The Shader Flags Analysis currently enables the Int64Ops shader flag in the presence of `extractelement` instructions introduced by the Scalarizer pass. These `extractelement` instructions are subsequently be removed by the DXIL Op Lowering pass. 

Potential Solutions:

1. Perform Shader Flag Analysis before Scalarization: This would ensure that the `extractelement` instructions are not yet introduced, thereby avoiding the need to account for their removal later. But it may impact the implementation of current and/or future Shader Flag Analyses

2. Split the Shader Flag Analysis into two stages: one before the DXIL Op Lowering Pass and one after. This would also require moving the DXIL Translate Metadata pass to follow after the later Shader Flag Analysis. Shader Flag Analyses that benefit from the DirectX target intrinsics could be performed before DXIL Op Lowering, and the Shader Flag Analyses that don't benefit from that should be performed after DXIL Op Lowering.

3. Complicate the logic for the Int64Ops Shader Flag Analysis: Detect when an instruction return an i64 operand or using i64 operands will be removed by a subsequent DXIL Op Lowering pass. This would probably be very ugly.
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJyUVk9z27gP_TTyBVONRFt2fPAhbcbz60x_086mh14hErK4S5EqCdrxfvodkk7j_NvpnhJJBIj38PBgDEEfLNGu6j5W3d0CI4_O7z5LN5Lyzi56p867WymdV9oegB1UYtmKpm23lfgEPBLc_fj8Be5HVORhb_AQYMYQwBKpkAJ6AnogGZkU9DQ4T09hX2f44k7kU-4cpS04nzKxg6Cn2ejhDJoDpP9pIsvI2lnoz9BTisLeUDp8cv4vUNqTZHOGk-YR7vLTD2D0B2LQlr22QctQw__ciY7kCwQdQNFMVpGVZ5CekCkAghzRGLIHSscw5KpDwTkYPABaNOegA-gAPQZS4CxoG9hHmYpMEcgw4RmsY6AHHRhw4IRuJDDXwOuqua2a2-9jThciwQkDKB2kO5InVRClsBdEuCG__Wx5vfo6h-eNuH2sEK3KxzyFaDhdmukfUJv0cESj1S9iq3WjHo7VugEVM7eTDhOyHEll4AEqcTMyz6Fa3lZiX4n9QfMY-1q6qRJ7Y46Pfz7M3v1Jkiuxn6Mxldi3YtvcbCuxzCilmxKUD2K97bpNc7NeV2Jbw_eR3gEio_dkU4vJptaH5-iv26Nt_jZ7CmQlJaaqdUMP7FEyFQ4TyGcdSyJxKsqk1XOOv5do0Ou_yZdGpeIC_UYq9AQh9oF-xlJxn_if3PEp95szUEPRwjfHZFmjgXtnYs6Z-M7f2hq-kR-cn655eqLpMmePtefWVstbyPo6uWgUkA0xjyJyruX3ACUhny_DVHi62ICn_gx4dLr4xEjZAJJ6UEoXLcPgsu61LyygAYNMvoaPkUGXOdHTjJLf0fml90nMldg7D0PkBOE1AxQKTaKG-9nokvBNorRlB3xyEBgPlAgGZ-lffepb8qk0UOlgHuf6mlc0wYGnn1F7gskdH-nIeb57tCHBhv8To0LGYnvsYHDGuNO1PyR23qy6fhNyaWVPlgbNMHg3lXvfc0GQud6eYC5SevLnl5izAV4s5P2rlbOV2LwqARnC-PqqAvTlTRcfXNbwySX3l4mr4pYHLR819Kbd_aInNfGOmCTDaSQL-MyVwRNHX96uV-Bm8rmZHmJIvbp6GeCkjXkxt3g11O8N8JUcZu967Mv0H8mfIR7MuV6o3VJtl1tc0K7drNq2bbvVdjHu1kvEGxS4FLK5aftNt6JNRxulaENLsVkt9E40omuWzaq9abrVtsaO5GY1yHXbLVUv-2rV0ITa1Ml_a-cPi-y0u1ZsN91mYbAnE_K-F8LSqWybSoi0_v0um3YfD6FaNUYHDk9pWLPJPxQuiqq6O_iDPtARTUxdykLOyzsRkTo1Z4tIT9L5FFP4mpyKhsoqWURvdv95l-SaQ9kmCdRxJ_4JAAD__1ECFso">