<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/129071>129071</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
AMDGPU inreg arguments for SGPRs use whole VGPRs after SGPR arguments run out
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:AMDGPU
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
arsenm
</td>
</tr>
</table>
<pre>
When SGPR available for argument passing run out, they silently switch to using whole VGPRs to pass arguments.
```
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -o - %s
target triple = "amdgcn-amd-amdhsa"
define i32 @test0(<8 x i32> inreg %arg0,
<8 x i32> inreg %arg1,
<2 x i32> inreg %arg2,
i32 inreg %arg3,
i32 inreg %arg4) {
%add = add i32 %arg3, %arg4 ; arg3 is v0, arg4 is in v1. These should be packed into a lane and extracted with readlane
ret i32 %add
}
```
Ideally we would start to pack inreg arguments into individual lanes of VGPRs, not directly into VGPRs.
In this example, we ran out of SGPRs after 18 arguments. %arg3 and %arg4 end up in v0 and v1. We could treat these as WWM values, and pass them in v0.lane0 and v0.lane1.
Either way, we should get a scalar value in downstream code rather than forced VALU usage
</pre>
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