<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/128638>128638</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Support USubb/IMul/UMul/UDiv in the DirectX backend
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          farzonl
      </td>
    </tr>
</table>

<pre>
    
The plan for the frontend changes is still open for DXC so no frontend change is needed just yet for HLSL:
https://github.com/microsoft/DirectXShaderCompiler/issues/6727

What is defined is we need a way to lower llvmir to these DXIL opcodes:

ID | Name | Description
-- | -- | --
41 |[IMul](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#imul) | multiply of 32-bit operands to produce the correct full 64-bit result.
42 | [UMul](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#umul) | multiply of 32-bit operands to produce the correct full 64-bit result.
43 | [UDiv](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#udiv) | unsigned divide of the 32-bit operand src0 by the 32-bit operand src1.
45 | [USubb](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#usubb) | unsigned subtract of 32-bit operands with the borrow

DXILOP | LLVM Intrinsic
-- | --
  USubb | Intrinsic::usub_with_overflow
  UMul | Intrinsic::umul_with_overflow
  IMul | Intrinsic::smul_with_overflow
UDiv | TBD

</pre>
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