<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/126375>126375</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Elminate indirect conditional jump when branching to function
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          marcauberer
      </td>
    </tr>
</table>

<pre>
    Split off from the discussion here: https://github.com/llvm/llvm-project/issues/126363#issuecomment-2645730295

Given this code:
```cpp
void t(), f();

void decide(bool ok) {
    if (ok) {
 t();
    } else {
        f();
    }
}
```
we currently produce this assembly for armv8-a / AArch64 (https://godbolt.org/z/hrEeqrTPM):

```asm
_Z6decideb:
        tbz w0, #0, .LBB0_2
        b       _Z1tv
.LBB0_2:
        b _Z1fv
```

This should be equivalent to this:

```asm
_Z6decideb:
 tbz     w0, #0, _Z1fv
        b       _Z1tv
```

 In a second step, maybe even this, which compares the whole register instead of a single bit:

```asm
_Z6decideb:
        cbz     w0, _Z1fv
        b _Z1tv
```

This optimization is of course only possible when the function call needs no register prep for arguments or such.
I am not particularly familiar with the AArch64 backend, so let me know if the current behaviour has a certain reason.
</pre>
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