<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/126227>126227</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[ARM] Invalid invalid fixed-point conversion instructions accepted by assembler
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:ARM,
accepts-invalid,
mc
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
ostannard
</td>
</tr>
</table>
<pre>
These instructions are invalid because the two register operands must be the same, but they are accepted by the LLVM assembler. Both ARM and Thumb ISAs are affected.
```
.arm
vcvt.u32.f32 s0, s1, #1
vcvt.u32.f64 d3, d4, #1
.thumb
vcvt.u32.f32 s0, s1, #1
vcvt.u32.f64 d3, d4, #1
```
```
$ /work/llvm/build/bin/llvm-mc -triple armv8a < fixed-point.s
.code 32
.p2align 2
vcvt.u32.f32 s0, s0, #1
vcvt.u32.f64 d3, d3, #1
.code 16
.p2align 1
vcvt.u32.f32 s0, s0, #1
vcvt.u32.f64 d3, d3, #1
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJysU89vszgQ_WvMZRRkxpCQAwfaCqlSe-lWe_ePSfAWMLIN3f73K0jSJlX303f4LCvxjEfz3sPzZAj2OBBVrLhjxUMip9g6X7kQ5TBIbxLlzEf12lIgsEOIftLRuiGA9Etilp01oEjLKRDEliC-O_B0tCGSBzeSl4MJ0E8hgjpVBNkTw3tQU1zij7WV1JrGSAbUx1r09PT3M8gQqFcd-RTuXGyhfnkGORh4badeweNf9YmGPBxIRzIp4_Wyt_y8eQ2QSt-vh1nPMZ0EpgeBEPjCIGTLL0ORfavY5mDEcmfym4o0Lsh_qN01z-8h5sCweXf-jWHTdXPPsFGT7czyb4dzctNr2ERvx45A-n4uJTBxDwf7L5nN6OwQ07BSOa1UO0MAIPA6OaLs7HG4xOvdjTiAiz5-o--0blQCXISKH0pP-Nn2F-g_d_5_Er-B_vldE1MJsxd7mVCV7US5x6Lc75K2or2RQuSc57k5cFNoEjpXUmWlynLSJrEVciw48l3GizLbpfvysNUC5bYsjd7tCpZz6qXt0uVVUuePiQ1hoirDLeIu6aSiLqwWQ1RSv9FgmKjrl2eGyPCeIZ7mP2zOlvrM93o5Fg-Jr9YXV9MxsJx3NsTwhRZt7FYLLy2LB3g8G_Ni0KuJAO2GmXywbvhm6CsHfhovmXxXtTGOgYmaYcOwOdrYTirVrv8azZXa6N0_pCPDZhUfGDZn_XOF_wUAAP__Ac9HJQ">