<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/126323>126323</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [DX] LLVM Optimizations may generate invalid integer types
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:DirectX
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          llvm-beanz
      </td>
    </tr>
</table>

<pre>
    Given the example below:

```hlsl
export int fn(float ColorIdx) {
  int ColorIdx1 = (int)ColorIdx % 8;
  return (ColorIdx1 + 1) % 8;
}
```
[Godbolt](https://godbolt.org/z/Ecj5bbcfo)

LLVM's Correlated Value Propagation pass reduces the i32 values to i8 since the are constrained to that value space. This results in generation of invalid DXIL.

We need to figure out how we want to handle this. It probably makes the most sense to have a legalization pass late that up-converts to the smallest supported integer sizes based on the compiler settings.
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJxcU01v5DYM_TXyhcjAlvwxPviQ7HQWAVK0h2KbqyzTtnZlyRDpycevLzTONMECAmyI5NN75KMmspNH7ET1IKpTpjeeQ-ycuyx3PWr_nvVheOu-2wt64BkBX_WyOoQeXXgR6l7k11Pn-5kdOZHf4-saIoP1DKMX8ji6oBm-BRfi4_AqZAuieRD5PVxTbvcFCHUCIY_Ws5Dt7RqErOAo1F4QkbfoU9aXMvkAxRX1M1M0p6_E0n_18D0MfXAsqpOQx5l5pSRBnoU8T3voEOIk5PldyPMf5mfV92YMQra7zKenH38K2RB8CzGi04wD_NBuQ_g7hlVPmm3wsGoiiDhsBunaM6skXFIaAQewRyDrDV5DOiKY4Imjth6HFOdZ854OtGqDB_hntgmQNscE1sOEHuP-VhjB-ot2doDT8-PTYef5L4LHHW200xYRwsYwhxd4QXjRnlNk1n5wiYWlAzwyrDH0undvsOhfH8SXQAyEnnAvuCBocDhpZ9-_aE2N2Glv650J_oKRaZeCQIt2DhPOtiZT4JBmjhNGIPuOBL0mHCDs9jJhWa1LMWS2fqJDNnRqaFWrM-yKRh3bui1lm81dW4yjquvGlMe2bOoSy7Eq67oYW1kVhRwy28lcVrnMG6lyVR4PtRqMViZv-kb1pshFmeOirTsku6fBZ5Zow66QtZIqc7pHR9fNkLLX5hf6Qaj7k41o-FlImRbmtivbRKLMnSWmTzi27K6rdXoW1QmSfeCvle3y0T6CRb_dxon_T_LWH35bkbItuu43q1qet_5gwiLkOT328blbY_iJhoU8X4WQkOcPLZdO_hcAAP__Y_1HjA">