<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/124776>124776</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            AMDGPU should make v2i32 and/or/xor legal
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            missed-optimization
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          arsenm
      </td>
    </tr>
</table>

<pre>
    We currently failed to make use of s_or_b64/s_and_b64/s_xor_b64 in the uniform cases, and scalarize into pairs of the 32-bit binary operators. Making them legal is simple (starter patch attached), but avoiding all the regressions is more difficult.

[0001-AMDGPU-Make-v2i32-and-or-xor-legal.patch](https://github.com/user-attachments/files/18576211/0001-AMDGPU-Make-v2i32-and-or-xor-legal.patch)

We need additional combiner work to avoid the regressions 
</pre>
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