<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/124542>124542</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[InstCombiner] WRONG code, InstCombiner suspected
</td>
</tr>
<tr>
<th>Labels</th>
<td>
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
JonPsson1
</td>
</tr>
</table>
<pre>
Bisect:
f044564db1cbc588d0cad4f953d38f6c787dadd4 is the first bad commit
commit f044564 "[InstCombine] Make backedge check in op of phi transform more precise (#106075)"
clang -march=z15 -O1 wrong0.i
[wrong0.tar.gz](https://github.com/user-attachments/files/18558277/wrong0.tar.gz)
I could not revert this commit cleanly on main, unfortunately - the diff below is between f044564^ <> f044564.
It looks to me that the inserted constant in the PHI should be 1 and not 0, or?:
```
cond.end: ; preds = %cond.false, % cond.end: ; preds = %cond.false, %
%cond = phi i64 [ %1, %cond.true ], [ %div, %cond.false ] %cond = phi i64 [ %1, %cond.true ], [ %div, %cond.false ]
store i64 %cond, ptr @func_34___trans_tmp_29, align 8, !tbaa !11 store i64 %cond, ptr @func_34___trans_tmp_29, align 8, !tbaa !11
%3 = load ptr, ptr @g_77, align 8, !tbaa !13 %3 = load ptr, ptr @g_77, align 8, !tbaa !13
%4 = load i32, ptr %3, align 4, !tbaa !4 %4 = load i32, ptr %3, align 4, !tbaa !4
%conv9 = trunc i32 %p_37 to i8 %conv9 = trunc i32 %p_37 to i8
%cmp.i = icmp eq i8 %conv9, 1 %cmp.i = icmp eq i8 %conv9, 1
%conv1.i = zext i1 %cmp.i to i32 <
br i1 %cmp.i, label %safe_mod_func_uint8_t_u_u.exit, label %cond.false.i br i1 %cmp.i, label %safe_mod_func_uint8_t_u_u.exit, label %cond.false.i
cond.false.i: ; preds = %cond.end cond.false.i: ; preds = %cond.end
%conv8 = trunc i32 %4 to i8 %conv8 = trunc i32 %4 to i8
%5 = urem i8 %conv8, %conv9 %5 = urem i8 %conv8, %conv9
%rem.i = zext i8 %5 to i32 | %6 = icmp ugt i8 %5, 1
> %7 = zext i1 %6 to i32
br label %safe_mod_func_uint8_t_u_u.exit br label %safe_mod_func_uint8_t_u_u.exit
safe_mod_func_uint8_t_u_u.exit: ; preds = %cond.end, %co safe_mod_func_uint8_t_u_u.exit: ; preds = %cond.end, %co
%cond.i = phi i32 [ %rem.i, %cond.false.i ], [ %conv1.i, %cond.end ] | %cond.i = phi i32 [ %7, %cond.false.i ], [ 0, %cond.end ]
%cmp10 = icmp ugt i32 %cond.i, 1 | %or = or i32 %4, %cond.i
%conv11 = zext i1 %cmp10 to i32 <
%or = or i32 %4, %conv11 <
store i32 %or, ptr %3, align 4, !tbaa !4 store i32 %or, ptr %3, align 4, !tbaa !4
%6 = load i32, ptr @safe_mul_func_uint32_t_u_u_ui1, align 4, !tbaa !4 | %8 = load i32, ptr @safe_mul_func_uint32_t_u_u_ui1, align 4, !tbaa !4
%idxprom = sext i32 %p_36.3 to i64 %idxprom = sext i32 %p_36.3 to i64
%arrayidx = getelementptr inbounds [7 x i32], ptr @g_95, i64 0, i64 %idx %arrayidx = getelementptr inbounds [7 x i32], ptr @g_95, i64 0, i64 %idx
%7 = load i32, ptr %arrayidx, align 4, !tbaa !4 | %9 = load i32, ptr %arrayidx, align 4, !tbaa !4
%dec = add nsw i32 %7, -1 | %dec = add nsw i32 %9, -1
store i32 %dec, ptr %arrayidx, align 4, !tbaa !4 store i32 %dec, ptr %arrayidx, align 4, !tbaa !4
%mul = mul nsw i32 %6, %7 | %mul = mul nsw i32 %8, %9
%conv12 = trunc i32 %mul to i8 %conv12 = trunc i32 %mul to i8
store i8 %conv12, ptr @g_185_1, align 1, !tbaa !8 store i8 %conv12, ptr @g_185_1, align 1, !tbaa !8
store i8 %conv12, ptr getelementptr inbounds (i8, ptr @g_255, i64 12), a store i8 %conv12, ptr getelementptr inbounds (i8, ptr @g_255, i64 12), a
%tobool16.not = icmp eq i32 %p_36.3, 0 %tobool16.not = icmp eq i32 %p_36.3, 0
%tobool19.not = icmp eq i32 %p_37, 0 %tobool19.not = icmp eq i32 %p_37, 0
%.47 = select i1 %tobool19.not, i32 0, i32 11 %.47 = select i1 %tobool19.not, i32 0, i32 11
%8 = or i32 %p_36.3, %p_37 | %10 = or i32 %p_36.3, %p_37
%cond37 = icmp eq i32 %8, 0 | %cond37 = icmp eq i32 %10, 0
%cleanup.dest.slot.0 = select i1 %tobool16.not, i32 %.47, i32 9 %cleanup.dest.slot.0 = select i1 %tobool16.not, i32 %.47, i32 9
br i1 %cond37, label %cleanup.cont, label %cleanup22 br i1 %cond37, label %cleanup.cont, label %cleanup22
```
@nikic
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJy0WFtz46gS_jX4hYpKgK4Pfshlcs6cqrMztS_7qEIC2Wwk8ALKZX79FkjYsmMndpJxuUq29PXXTXfT3YIaI1aS8yVIb0B6t6CDXSu9_J-SP41REi1qxV6WN8LwxgJyDeLrNk6SNEtYjZq6SYuCxQ1lSVumhJGizZq8yBllLIHCQLvmsBXaWFhTBhvV98KC2LGMv-FEBgHGIL35Lo29VX0tJAfpHfw_feCwps0DZysOmzVvHqCQUG2gauFmLaDVVJpW6R72SnO40bwRhkOAC4AJirM4TwEuHfeos6NyBa96qps1IHe_UAqvfiD4pJVcxZFwoPRm-mepjla_QHoHcLG2dmPc4vE9wPcrYddDHTWqB_h-MFxfUWtps-65tAbg-1Z03F1RkaYFznOA7_c5cTma8x02augYlMpCzR-5ttCuhZncBJuOU9m9QCVhT4UE-BYOslXaDpJa3r3AK-9eJtoW1rxTT87hNbdPnMvgV5B-g4DcAvIt3Ikm3RZ2Sj0YaBXsObRraj2bkIZry12spLFUWudw9-Dnf79Ds_b21hwiSOVoeOzsUhqQ-zE73DeLp68Ls2QRlwyQawjIjQsRMxCQOwhw6h-2tDPckQCcQv-5TAbE1zA88CCXGMKlVHrj7qMJ5wWtHjj0Qb0Nz5l4nCM8tYPA45_foMmvwFiXwZ5tfO6gG6shSOJ2kE1FkqqqfMJXtt9ULq1vIe3ESsJipEW2ptRdETq0-mvZg8uJ90KnKHNcM8pV5dL-JAE54dtDR3-YPxiY7AgEwVsCnJKddHIgnXxY0Gkd3ftYenmrB9k4And7U5Hc7TZRnAXapnW_iYQHiqbfQP7PnMBZgM5DzYxDE_QXf7ZQzOSdYoLPCc4UInLraGs9Z3HaOlrzzt0xtOVVr1jlk2wQ0haVrYZqiPizsHvQ3Z6IxG-gDF1ndodcn7nKYyWISzbDfCnvrKI9Fq9zJNnPotOIwJN6xKB5PxfblSKXiOegAp_m_V4GFaP4lD0gvw37N9tl5LDaAnfpSL4FZH6YkNlE53XW-tzwn5u55zOOefMO5mSj4mOl9X9HzV_BNG95UyR8K3LeH1uND9GrZuOwex1pqgZzoMvrbfebxfK0rvwdPfER-ll1Q_FBlow5POqbCtzODKU9Wultrs_ZxXzrIHSkyqH44ioXytx76h9ft93zuacGPZIqfW6r-phYWE12vMsl8ZikQ7dLUoLHLK0Ggd4y6CBrii_XEGwX7HmjVe_5jQ_xtoNmEfFBzpILY3EmazCBak1fBHv26BW3vOPuHcCtUMhaDdJt4fQmh89-8eOO2E4wpS-Ezsg4_BgNmJnzmzSEBeSnppyg980paRfl8hM8wRbGG89CGYPSPAXH--JytVcCTiDLEfl6NzHeXLi0dz6fYw8L7ofOL8NdZ8vIpoKSz5d8Ahu6c7lX9vDrgcDJ7Q0Nb4LmLpxJ7OUWKtJqtk3RwSqLz8q_Y8OpvYALUezpmeYNl_tOenytOQjkl_NPs7ZVtVIdyiL3nrw3m8-LipOIL4SHeE8i5Rsi-ch_WRk8mzcYEiX5VDM73oR2O2fxTiJ4qkQEQ4Q-Khd0FgeteOef8CJ14We24aah5A3y-QxG8mNOKqbI7s9Qx7Eo3rrT4TpO5bCJGDc2Mp2yUXzSS9ncS6NHw7_yK7nCID5NUn4l-y9bk6JGSXvsAX5z5Poc83TutH_05L5JLMWDaOCCLQkrSUkXfIlykpdFSkq0WC_LnGNEy5ZkLC1Im2YxR6hFSdryukY1WogljnEaI5wjkhCEoqQp84ZkeRYTlsZtDZKY91R0Udc99pHSq4UwZuBLhJM0wQtvrAmnq3rpUFf1sDIgiTthrNnJWWE7fw47OwbVbhb_688ff_wHNor5M6_5U2gGs-GN5Wwx6G75xkGl0zJdrjZa_c0bC_C9N9UfVo7WPi7xvwEAAP__I5ELfA">