<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/123208>123208</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
AMDGPU silently converts incorrect physical register asm constraint to virtual register
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:AMDGPU,
accepts-invalid
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
arsenm
</td>
</tr>
</table>
<pre>
```
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 < %s
define void @invalid_sgpr(<2 x i32> inreg %arg0) {
call void asm sideeffect "; use $0", "{s[1:2]}"(<2 x i32> %arg0)
ret void
}
```
s[1:2] is not a valid SGPR reference as 64-bit SGPRs require even alignment. This is silently accepted, and appears to be treated as a virtual register constraint. In -stop-after=finalize-isel, I see:
```
%10:sreg_64 = COPY %11
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 3997705 /* reguse:SReg_64 */, %10
```
</pre>
<img width="1" height="1" alt="" src="http://email.email.llvm.org/o/eJxsU1GPozYQ_jXDy4jI2BDCAw8kXE4r9bar3d5Dn04GD8StMdQ20W1_fWWSdtNrpUQIz_B933zzWXqvR0tUQ3GEok3kGi6zq6XzZKekm9V7DXt2_7EGxBFfvz6DaNCYHtMpOL0YAtHKSY29TeWk4v_iJaZTv6wg2nH4XuUMQZwQeOEjCmsUDdoSXmetEHKm7VUarb75cXHADyBOHL-jFhzEJ9TW0Ri_lW5kwCuE8gisQeylMTcI6Sf0WhENA_UBgfOodPWEwHMWX_lpOy2PHopjBqLhULRQtlvtB8IPqo3GUdhYovKyven_lymseQRF7dHOASVuM-Hb55dXdDSQI9sTSo_7PO102AoeHf2xakdIV7IojR7tRDbs8JeL9hHKa0M2mHeUfU9LIBVHkVahXBaSzmOYsSMMjmSg6EQk1i6s0qCjUftADvvZ-uCkjsBPFlMf5iWVQyAHoh20lUb_San2ZCL6E3oiEM1_R0XE6E7GQDTe0fhtnyOIFk8_v_y6FbLY9PT809Pzp-btCwLf__8uMgR-Bt48bk2GoLQ0twU2W_2EoqrKkhV_tzsaVx-1vb3e2f_pvOl60JuoWqhKVDKhOitFycRBHFhyqQsSpeRCFRkNvSpEJcSgWHVQGStzvmeJrjnjBcuyfZaLShx2KqdDsT8UndpnGc845Iwmqc3OmOu0m92YaO9XqjMuODskRnZk_HanOO9k_ztZBaJpvrSfX77eHADObwv16T388bxoE1dHzLRbRw85M9oH_8ESdDBU33A-ktHP9koueNS2n52LBi6Xd6_7xwjEK_IRg5iaH1OSrM7UlxAWH3cfTT2POlzWbtfPE_BzVHF_pIubf6M-AD9vg3vg5_vs15r_FQAA__9m3Etn">