<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/122974>122974</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [llvm-exegesis][RISCV] computeAliasingInstructions in SerialSnipperGenerate generates instructions that can't be assembled
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:RISC-V,
            tools:llvm-exegesis
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          topperc
      </td>
    </tr>
</table>

<pre>
    I tried to run through all RISC-V opcodes available on my SiFive P550 system using -opcode-index=-1. I got some crashes trying to assemble pseudo instructions.

Should llvm-exegesis be filtering pseudos and custom insertion instructions in this function?

CC: @boomanaiden154 @mshockwave 
</pre>
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