<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/119182>119182</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[RISCV] error in generating assembly for compressed instruction
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
ahmedshakill
</td>
</tr>
</table>
<pre>
` int a=20, b=10; `
` asm volatile ("c.sub %0, %1":
"=r"(a):
"r"(b)
); `
Clang generates the below assembly sequence for the above code
`li a0, 20 `
`sw a0, -20(s0) `
`li a0, 10`
`sw a0, -24(s0) `
`lw a0, -24(s0) `
`sub a0, a0, a0`
`sw a0, -20(s0) `
which is subtraction of `b` from `b` ie ` (b-b) ` whereas subtraction of `b` from `a` ie `(a-b) ` is expected
see it on [godbolt](https://godbolt.org/z/z8xdPdaKW)
### expected assembly
`li a0, 20 `
`sw a0, -20(s0) `
`li a0, 10`
`sw a0, -24(s0) `
`lw a0, -24(s0) `
`lw a1, -20(s0) `
`sub a1, a1, a0`
`sw a0, -20(s0) `
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzEVEFv6zYM_jXyhUggU7ZjH3xoGgQYdhk2YDtLFhNrk61MkpN2v36Q7Tbt9trX2wsYKfHHj6T1kZIhmPNI1LJyz8pDJqfYO9_KfiAdevmXsTZTTj-3rOJgxgiSiQNyho-gmDjknIk9sIoz_gCQfoAMA1ydldFYAoY1Q-y2YVLAsJx5DMucITLxsJDmz_zg4NOGtWTY_A9eMZWwBZi99rDkZfxhsUcrxzOcaSQvIwWIPYEi624gQ6BB2WcI9PdEY0dwcn7GpXJXgs5pWsNU3Jols5xrRv6So-Lh9hbZpMOoA2fY3F3ek3P-Ibf4Bvf2GZoO8h7gdf1ybbPdetP1YAKESUUvu2jcCO6UfFSS8OTd8PrH0CxrOvqNWiPBrSdP8rsB5D1AkvXONwHo6UJdJA1LTYEITAQ3Aiv3Z6eVs5GVB4Z1H-MlpHbAI8PjCm2dPzM8_pO-9ZP-Rcuf_1g6YzUUi93zvMj_VuIfoe6XXfIPK3jtgtllXd_V8UkDZLoVuhGNzKjNd0LshKgbkfWtrPSpbnaSThzLSpXdri51kXe6LLhsOpGZFjkWOfKG10VRim3VVbtaNycthSKkmhWcBmns1trrkCTKTAgTtXne5DVmViqyYb5qEEe6wYymuS4PmW8TaaOmc2AFtybEcA8TTbTzHfXrT789_s7KA5D3zoMZXybdjOf7gKe57txw8RQCaTBjiH6auzSbvG3_01Em9pPadm5geEwZ121z8e5P6iLD41xnYHhcX-Ta4r8BAAD__3hVZYg">