<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/115459>115459</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISC-V] Segment Load-Store Intrinsics Change Values in Non-operational Memory
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Yibo-He
      </td>
    </tr>
</table>

<pre>
    Similar to case [115446](https://github.com/llvm/llvm-project/issues/115446)

In the following code with rvv intrinsics, I load data from a to b, and from a to c.
However, values of vector a are not equal to values in vector c after the for loop.
(data in c is changed by operation of vector b)
```
#include <riscv_vector.h>
#define dataLen 20
uint8_t idx[dataLen];
double a[dataLen]; double b[dataLen]; double c[dataLen];
int main(){
  for (int i = 0; i < dataLen; ++i) { a[i] = i * 10.0; }
  for (int i = 0; i < dataLen; ++i) { b[i] = 0; c[i] = 0;}
 int placeholder0 = dataLen;
  double* ptr_a = a;
  double* ptr_b = b;
  double* ptr_c = c;
  for (size_t vl; placeholder0 > 0; placeholder0 -= vl * 7){
    vl = __riscv_vsetvl_e64m1(placeholder0);
 vfloat64m1x7_t va = __riscv_vlseg7e64_v_f64m1x7(ptr_a, vl);
 vuint8mf8_t vidx =  __riscv_vsll_vx_u8mf8(__riscv_vid_v_u8mf8(vl), 3, vl);
    __riscv_vsoxseg7ei8_v_f64m1x7(ptr_b, vidx, va, vl);
 __riscv_vsseg7e64_v_f64m1x7(ptr_c, va, vl);
    ptr_a += vl * 7;
 ptr_b += vl * 7;
    ptr_c += vl * 7;
  }
  for(int i=0; i<dataLen; ++i) { __builtin_printf("%lf ", a[i]); } __builtin_printf("\n");
  // for(int i=0; i<dataLen; ++i) { __builtin_printf("%lf ", b[i]); } __builtin_printf("\n");
  for(int i=0; i<dataLen; ++i) { __builtin_printf("%lf ", c[i]); } __builtin_printf("\n");
  return 0;
}
```

Result:
```
$ clang -march=rv64gcv_zvfh -mabi=lp64d -Wno-psabi -static -O0 1.c -o a.out && qemu-riscv64 a.out
0.000000 10.000000 20.000000 30.000000 40.000000 50.000000 60.000000 70.000000 80.000000 90.000000 100.000000 110.000000 120.000000 130.000000 140.000000 150.000000 160.000000 170.000000 180.000000 190.000000 
120.000000 130.000000 20.000000 30.000000 40.000000 50.000000 60.000000 70.000000 80.000000 90.000000 100.000000 110.000000 120.000000 130.000000 140.000000 150.000000 160.000000 170.000000 180.000000 190.000000 
```

The above results appear in LLVM 18.1.8 and 19.1.0 (with qemu 9.1.0).
```
$ clang --version
clang version 19.1.0
Target: riscv64-unknown-linux-gnu
Thread model: posix
InstalledDir: ...
$ qemu-riscv64 --version
qemu-riscv64 version 9.1.0
Copyright (c) 2003-2024 Fabrice Bellard and the QEMU Project developers
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzcV01v4zYT_jX0ZSBBomRZPviwtjfYANn3bTftFj0JFDW22dKkl6SUZH99QUqW7DRuD8FeGgTyYD6eeYYakiNmrdgrxBWZr8l8O2OtO2iz-l3UOvqEs1o3L6tHcRSSGXAaOLMIZL5O03meF2S-JbQ8OHeyJPtA6B2hd3vhDm0dc30k9E7K7vwTnYz-A7kj9E5Y26Il9G5AoUuSbEnyoX_eK3AHhJ2WUj8JtQeuG4Qn4Q5gug6EckYoK7gldAP3IDVroGGOwc7oIzDPsvYmppoLFY979E_6CTs03qFjskULegcdcqcNMGAGQWkH-K1l0ocNPkKdfTiwnUMzUDQgtT4N0ISWgYdQwEFY4Aem9thA_QL6hIY5odVFtnqqu0iG_wEnE4rLtkEg2cYIy7uqj4kPJPs4OjW4EwpD7Q-ogA7hrVCurByI5pnM14PVv6ls3Ts0uq0lAntthcFQ3zLwt_GEcnBkQhFa-pIWgxrC-hBaersAkm0h8WBe3JxZewWha0LXgtAlkMU68BJkvg0RAgj9AGkSh1Cy2L4Pu77EDhH8tWbK4bFPknE8aNmgSYLLhH1m0i-Op3lypmLBi92018Fe37TzYOcX9qFSK75j5aCTnvUrWh_7Wq60kcfpZFi_xfV7gaDPtlBVQ3dZdJ2ssMiPKaHlJY6PHLl0O6mZ817PC8-FXaNIi_sFFnnVVbveyYP5RQnbTV5jhT497nyrdqJ5DlAXjKSsuueq9R6ElqNeNFU3antIuoHsjQRwiaafAzdR_o1bOCs8gf5IeANoQrlVH78ZC3DuCrq-eiGjx9AUt8wDAP8Hj-tdcd4UJNv2W4Jkm9sboqrqVkgnVHUyQrld2MOU0LncQRA2437s6_LZbkXNNyrEXNbfXwo_hFj9LmI_ghF_FyODrjWqP4T6M_78Yl9fEOH5BW0rnb93375EcuCSqT1ER2b4gWRb0xX5nnfV92538NraFy5PRd5A9JvS0cmyWkBkHXOCQ_T_BNKYQ6SBxbp1QGhBaAHf8NhGYUMUeW_pEyZxEv7CYd1LdJSyUcpHaT5KxSgtRqkcpeUF8iROWdIpTTrlSadE6ZQpnVKlU650SpZO2fqy3kb_L1T2ZlP9ckBgte4QTGgvC-x0Qmb8UPPw8PUzpGWcxmUYrtJlnMaJv5vCcOYbA4KK0GX8b00ZdWis0Ko39MpBNQAPhJjZo-9yGHouatWfSj-pSArVPkd71Z6ZG2QNHHWD0ruftBXP54nSOiYlNlthvCmO44nPVT-_onVlO7O7ILfRpxcj9ge_OUruDwqaJFlEE5rDHauN4AhrlJKZJqyYHxp__vj5V_ipn4WhwQ6lHw7tq_WaNausWWZLNsNVusjSpEgXSTo7rApWM55hVtAdK9Oy5DTLE1bUyZIhzRM6EyufPk2TMk1oSdM4XS6bhuZ8kWU7RikneYJHJmTsp_JYm_0szOMrP4zPlzPJapQ2fA5QqvAJgjWcWduZWYVRvm73luSJFNbZCcYJJ8N3xJf7x0301Q9Vj7g_onLwoFkTPTptEO7H-R02YUCGr-OM_T-tonFUZhI-41Gbl1lr5Op9Hxnz5axb0b8CAAD__x3slwE">