<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/114941>114941</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
X86 stack realignment is incorrect when Spill/restore BP is used
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
mahesh-attarde
</td>
</tr>
</table>
<pre>
PR https://github.com/llvm/llvm-project/pull/81048 as Fix for Issue https://github.com/llvm/llvm-project/issues/17204
We addressed issue regarding "Spill/restore FP/BP around instructions in which they are clobbered"
After merge of PR, We saw runtime fails with general protection fault. It was at `vmovdqa64 %zmm19, 0x90(%rsp)` where effective address end up unaligned.
Check more details on https://github.com/llvm/llvm-project/pull/114791 discussion.
Repro from @rnk
https://godbolt.org/z/s16MxPME3
```
#include <immintrin.h>
int f() {
__m512i aligned{};
asm volatile ("vmovdqa64 %%zmm0, %0" : "=m"(aligned) : "m"(aligned) : "rbp");
return aligned[0];
}
---->
f():
push rbp
mov rbp, rsp
and rsp, -64
sub rsp, 128
....
push rbp
push rax
vmovdqa64 zmmword ptr [rsp], zmm0
add rsp, 8
pop rbp
mov rax, qword ptr [rsp]
mov rsp, rbp
pop rbp
ret
```
This is one of such issues.
</pre>
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