<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/113008>113008</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[ARM] Some processors appear to have optional features enabled by default
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
alexrp
</td>
</tr>
</table>
<pre>
See this Zig pull request: https://github.com/ziglang/zig/pull/18498 (specifically, [this hunk](https://github.com/ziglang/zig/pull/18498/files#diff-88edb24013ad7e5428ff29aac0ebba01f919136cfcfe17d806b1892b2af7d065R382-R404))
It seems that LLVM is enabling features for these processors that are actually optional, per Arm documentation. We're currently working around this in Zig by omitting these features by default in the Zig CPU model/feature data which is sourced from LLVM's.
Would there be interest in a patch to similarly disable these features by default on the LLVM side?
(Note: Please ignore the addition of `trustzone` to `cortex-m85`; as discussed in #109770, this was based on a misunderstanding and has since been reverted.)
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJycVE2L3DgQ_TXqS9GNLPnz4ENPhoaFZAkTdgN7K1ultjay5NXHTDq_fpF7SGYvc1gwtqFU9V69VyWM0Vwd0ciaB9Y8HjCnxYcRLX0P22Hy6jZ-IYK0mAh_mSts2VoI9E-mmJg8w5LSFpk8M3Fh4nI1acnTafYrE5cf5mrRXe9_TFxKKhOXqq-HHpjo40az0WZGa29MfADWPOwwS3bfWPPIRP8_izNx0cZSZEIqo_Wx70lNouaVRNVRU4teazEgzpymCXmlh2qoZDvrWVPVqZ63U9UPYhKoO8Xb5kn24vhU85qJoTz8kfHz_f1bgki0RkgLJvj48c9PYCKQw8kadwVNmHKgCNoHSAtFgi34mWL04TUHAwHOKRcVwG_JeIe2yLFRgHNYQfk5r-QSltAJvhITXSCYcwjkkr3Biw_fChgGn526W2Xc7tZ0A7-alEr4Dv-T0XQDRRqzTeVwWmhP-PD5D1i9oqLl61FQmBBeFjMvpbfoc5hJgQ5-3Rtmoount5p89dkWGhQIJgLjEgWKOwzChmleIHmIZjUWg72BMhEnS-8Q9HeCu7zRKGLy8haQif53n6iM42dLGAnM1fmwVwRUyhTlwGtgLU8hx_TDO2ItLzRYy2cfEn0_rn3DWs7kA2AsnOYcI6nCmglZ8aHreLFll_cFI0xYwr40tZqYnaIQEzq1W-EULBghGjcXEchBoGcKidSJieGgRqkGOeCBxqoTgxjaWtaHZax5TdTLvp1Rt1KhorptlZwa3YqGd_JgRsFFXfFq4Jx3VX3SQimuBlnLWjdtNbCa04rGnqx9Xk8-XA8mxkxjVUnO-4PFiWzcl10IRy-wR5kQZffDWJKOU75GVnNrYoq_yiST7H5LnJ8-seYRvvj1P8OM20YYiqQLPtPPSf7l574UpN74esjBju_seMF-_Ry34P-mOTFx2RnHsuv3lp5H8W8AAAD__y5mkII">