<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/111957>111957</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [InstCombiner] Mismatched known bits for...
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            nikic
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          JonPsson1
      </td>
    </tr>
</table>

<pre>
    opt -mtriple=systemz-unknown -O3 tc_verknownbits_trunc.ll -instcombine-verify-known-bits -o /dev/null
Mismatched known bits for   %2 = trunc i64 %1 to i8 in d
computeKnownBits(): 00000000
SimplifyDemandedBits(): ????????

opt -mtriple=systemz-unknown -O3 tc_verknownbits_and.ll -instcombine-verify-known-bits -o /dev/null
Mismatched known bits for   %3 = and i32 %2, 3 in i
computeKnownBits(): 00000000000000000000000000000000
SimplifyDemandedBits(): 000000000000000000000000000000??

opt -mtriple=systemz-unknown -O3 tc_verknownbits_or.ll -instcombine-verify-known-bits -o /dev/null
Mismatched known bits for   %2 = or i16 %1, 2 in main
computeKnownBits(): 1?????????????1?
SimplifyDemandedBits(): ??????????????1?

[tcs_instcombver.tar.gz](https://github.com/user-attachments/files/17338876/tcs_instcombver.tar.gz)

</pre>
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